Bo Zeng is an Associate Professor in the Swanson School of Engineering at the University of Pittsburgh. His research focuses on developing and utilizing optimization and analytics tools to address challenges in real systems, particularly in discrete optimization models with uncertainties, game theory models, and advanced data analysis and computing methods. His work is extensively applied in engineering, healthcare, and management systems. Dr. Zeng earned his PhD from Purdue University in 2007 and his BS from Xian Jiaotong University in 1998. His research interests span optimization, robust optimization, stochastic programming, power systems, demand response, renewable energy integration, high performance computing, game theory, mixed integer programming, and multilevel optimization. Analysis of Dr. Zeng's recent publications reveals a strong focus on power systems and energy applications, with significant contributions to microgrid planning, demand response modeling, renewable energy integration, and robust optimization techniques. His work demonstrates a consistent pattern of applying advanced mathematical optimization methods to solve complex problems in energy systems, with increasing attention to uncertainty modeling and risk management in power grid operations. Dr. Zeng has collaborated extensively with researchers across multiple institutions, particularly in China, reflecting the global nature of energy research and the international collaboration needed to address complex energy challenges. His publications span high-impact journals in power systems, optimization, and interdisciplinary energy research.
Dr. Irina Zeleneva is an Associate Professor at the Department of Computer Systems and Networks, Faculty of Computer Science and Technologies, Zaporizhzhia Polytechnic National University. With a Ph.D. in Computers, Systems, and Networks, she has 15+ years of academic experience since joining the university in 2003. Specializes in FPGA-based digital system design Focuses on hardware acceleration and reliability optimization Teaches advanced topics in microprocessor architecture Her research includes: Development of energy-efficient FPGA systems Hardware-software co-design Neural network text classification accelerators Reliable embedded control architectures Recent publications analyze FPGA implementation of floating-point multipliers, finite state machines with elementary state chains, and AI-enhanced educational frameworks . Her work frequently appears in international conferences like IDAACS and PIC S&T, with multiple Scopus/WoS indexed articles. Dr. Zeleneva's contributions: Co-author of two monographs on FPGA acceleration PI in multiple university research projects Active participant in annual "Week of Science" conferences
George Papadimitriou is an Assistant Professor in the Computer Engineering & Informatics Department at the University of Patras , Greece, hosted within the School of Engineering . His primary affiliation lies with the Computer Hardware and Architecture division, where he leads research and teaching activities focused on dependable, energy-efficient computer architectures. Education: PhD in Computer Science, Department of Informatics & Telecommunications, National and Kapodistrian University of Athens (2019) Post-doctoral researcher, Computer Architecture Lab, National and Kapodistrian University of Athens Research Interests: Dr Papadimitriou’s research lies at the intersection of computer architecture , energy efficiency , and microprocessor reliability . His work specifically targets: Robust and energy-efficient CPU/GPU/accelerator architectures Post-silicon validation techniques for catching elusive hardware bugs Silent data corruption detection and mitigation across the compute stack Characterization of voltage margins and power consumption in modern microprocessors Modeling and simulation of domain-specific accelerators for low-power, dependable operation More recently, his team has been extending these methodologies to RISC-V and neuromorphic photonic accelerators within large European consortia. Scientific Awards & Recognition: Eight HiPEAC Paper Awards for top-tier conference publications (MICRO, HPCA, ISCA) between 2017–2024 IEEE Transactions on Computers 2022 Best Paper Award for the article “Anatomy of On-Chip Memory Hardware Fault Effects Across the Layers” TTTC/ITC Gerald W. Gordon Student Award 2023 Research Funding & Projects: Dr Papadimitriou is principal investigator or key technical contributor in multiple Horizon Europe and industry-backed projects that collectively exceed €50 M in funding. Current leadership roles include: DARE (Digital Autonomy for RISC-V in Europe) NEUROPULS (Neuromorphic Energy-Efficient Secure Accelerators) REBECCA (Reconfigurable Heterogeneous Highly Parallel Processing Platform) Vitamin-V (Virtual Environment & Tool-boxing for Trustworthy RISC-V Cloud Services) Intel, IBM, and Thales bilateral research contracts on energy-efficient and resilient microarchitectures Laboratory & Team: He leads the Energy-Efficient and Dependable Architectures (EEDA) research group at University of Patras, operating laboratory facilities for silicon measurement, FPGA emulation, and full-system simulation (gem5, MARSS, custom tools). The team currently comprises 3 PhD candidates, 2 post-docs, and several MSc thesis students collaborating with European and US partners.
Assoc. Prof. Dr. Ali GÜLBAĞ is an academic at the Faculty of Computer and Information Sciences , Sakarya University , specializing in Computer Engineering . His career spans over two decades, focusing on FPGA-based hardware design, machine learning applications, and educational methodologies in computer architecture. Doctorate (2003-2006): Quantitative determination of volatile organic compounds using artificial neural network and fuzzy logic-based algorithms MSc (1998-2000): Building automation using telephone lines BSc (1994-1998): Electrical-Electronics Engineering His research interests include Artificial Neural Networks , FPGA Design , and Water Resource Management , with applications in seismic event differentiation, environmental modeling, and educational technologies. Recent work emphasizes water consumption prediction using machine learning. Key projects: BZK.SAU.FPGA microcomputer architecture , Remote FPGA laboratories Publications demonstrate expertise in combining machine learning techniques (ANNs, gradient boosting, random forests) with hardware implementations for real-world problem-solving.
Dr. Jose A. Boluda is an Associate Professor in the Department of Computer Engineering at the University of Valencia's School of Engineering. He holds a B.S. in Physics (Electricity, Electronics and Computer Science, 1992) and a Ph.D. (2000) from the same institution. With 6 teaching quinquenios and 4 research sexenios, his academic career spans over two decades. His research focuses on: Computer vision hardware design Smart vision sensors and neuromorphic computing Reconfigurable architectures (FPGA) High-speed motion analysis and change-driven processing Biomimetic visual sensing strategies He has authored over 50 international publications and participated in 15 research projects. His publications predominantly explore: Event-based vision sensors Hardware-accelerated image processing Neuromorphic engineering applications Real-time systems for robotics and 3D scanning Low-power circuit design for computer vision Awards include: Fernando Sapiña Award 2023 for Valencian teaching materials Fernando Sapiña Award 2021 for English teaching materials Fernando Sapiña Award 2021 for Valencian teaching materials He has directed 2 doctoral theses and supervised multiple master's projects. Research includes international collaborations at the University of Virginia, University of Macedonia, and Universitat Jaume I. His lab focuses on developing novel vision sensors and processing architectures.
Ernst Gunnar Gran is Associate Professor at the Department of Information Security and Communication Technology at the Norwegian University of Science and Technology (NTNU), where he heads the communication technology discipline. He also holds an adjunct research scientist position at Simula Research Laboratory, where he headed the Cloud department until December 2016. His research spans high performance computing (HPC), HPC interconnection networks, enterprise data centre networks, cloud computing, and data-intensive processing in multi-clouds. He serves as the Scientific Leader of Communication Technologies in the RCN-funded infrastructure project eX3 (Experimental Infrastructure for Exploration of Exascale Computing) and has significant experience with both RCN-funded and EU-funded research projects, including the H2020 project Melodic (Multi-cloud Execution-ware for Large-scale Optimised Data-Intensive Computing). Gran received his M.Sc. and Ph.D. degrees in computer science from the Department of Informatics, University of Oslo, in 2007 and 2014, respectively. Both theses focused on different aspects of resource management in high performance interconnection networks. He previously headed the RCN-funded project ERAC (Efficient and Robust Architecture for Big Data Clouds) and led the design, implementation, and deployment of the multi-homed IP-based research testbed NorNet Core. Gran also has several years of experience as a system administrator and scientific programmer. His research interests center on the intersection of high performance computing and networking, with particular focus on anomaly detection in time series data, HPC interconnection networks, network virtualization, and cloud computing infrastructure. His work demonstrates a consistent evolution from fundamental networking research to applied solutions for modern computing challenges, particularly in IoT security and smart home applications. His recent publications show a strong emphasis on developing lightweight, real-time anomaly detection systems using deep learning techniques. Analysis of his publication trends reveals a clear progression from traditional HPC networking research toward time series anomaly detection applications, particularly for IoT systems. His 15 most recent publications show dual focus areas: approximately 60% concentrate on anomaly detection methods for time series data (particularly for IoT applications), while the remaining 40% maintain his foundational work in HPC networking, virtualization, and cloud infrastructure. This evolution demonstrates his ability to adapt core networking expertise to emerging application domains while maintaining technical depth. While no specific scientific awards are mentioned in the provided text, Gran's leadership roles in significant research projects (eX3, Melodic, ERAC) indicate recognition of his research capabilities within the academic and research funding communities. His position as Scientific Leader of Communication Technologies in the RCN-funded eX3 project further demonstrates his standing in the Norwegian research community. Gran's teaching responsibilities include serving as course coordinator for DCSG1006 Data Communication and Networks, DCSG2001 Interconnected Networks and Network Security, and Networks: Administration, Programming and Security. His research leadership extends to significant grant-funded projects, including the RCN-funded eX3 infrastructure project and the EU H2020 Melodic project. His previous leadership of the ERAC project and the NorNet Core research testbed demonstrates sustained ability to secure and manage substantial research funding. His laboratory and team affiliations include the Department of Information Security and Communication Technology at NTNU, where he heads the communication technology discipline, and Simula Research Laboratory, where he maintains an adjunct position. The NorNet Core research testbed, which he led the development of, represents a significant infrastructure contribution to the networking research community. His current work with the eX3 project suggests ongoing involvement in experimental infrastructure for exascale computing exploration.
Dimitrios Soudris is a Professor at the School of Electrical and Computer Engineering, National Technical University of Athens (NTUA), leading the Microprocessor and Digital Systems Lab (MicroLab). Previously, he served as Lecturer, Assistant, and Associate Professor at Democritus University of Thrace from 1995 to 2008. Diploma in Electrical Engineering (1987), University of Patras PhD in Electrical Engineering (1992), University of Patras His research focuses on Embedded Systems , Reconfigurable Architectures (FPGAs) , Hardware Accelerators for data centers/space/cloud, Edge Computing , and Low Power VLSI Design . Recent publications highlight trends in: AI/ML acceleration for edge and space applications Secure FPGA architectures for 6G networks Energy-efficient heterogeneous memory systems Approximate computing techniques Transformer optimization for low-power contexts Scientific Awards: INTEL and IBM awards (project LPGD #25256) HiPEAC, DAC, and ISCA awards (2010–2024) XILINX Open Hardware Design Contest (2017, 2019, 2021) He has coordinated >70 R&D projects funded by the European Commission, ENIAC-JU, ESA, and industry partners. As Associate Editor of ACM TODAES and conference chair (PATMOS, VLSI-SOC), he contributes to academic leadership. His lab, MicroLab, specializes in hardware-software co-design for emerging computing paradigms.
Professor Luca Fanucci is a Full Professor of Electronics at the Department of Information Engineering , University of Pisa. He serves as Rector's Delegate for Inclusion of Students with Disabilities and leads research in integrated circuits, embedded systems, and assistive technologies . Institutional roles include membership in the National University Conference of Delegates for Disability (CNUDD) and leadership in the PhD program in Information Engineering. Born: Montecatini Terme (1965) Education: Laurea in Electronic Engineering (1992), PhD in Information Engineering (1996), University of Pisa Professional Journey: ESA research (1992-1996), CNR researcher (1996-2004), University of Pisa faculty (2004-present) His research focuses on: System-level design of integrated circuits and embedded systems Hardware-software co-design for low power consumption Spacecraft and satellite communication systems Medical devices and telemonitoring platforms Assistive technologies for disabilities Recent publications highlight AI in space applications and telemedicine systems . Key projects include the Ingeniars spin-off for satellite communications and the AsTech National Laboratory for assistive technologies. Scientific Recognition : IEEE Fellow (2019) 40+ patents H-index 34 (5000+ citations) He coordinates international conferences (DATE, HiPEAC, Spacewire) and serves as Associate Editor for Technology and Disability and Microprocessors and Microsystems journals.
Adriano José Conceição Tavares is an Associate Professor at the School of Engineering, University of Minho, Portugal. He serves as a Senior Researcher at Centro ALGORITMI, where he is affiliated with both the IE R&D Group and the ESRG R&D Lab. His academic credentials include a PhD in Industrial Electronics from the University of Minho, a Master of Science in Information Technology from the University of Coimbra, and an undergraduate degree in Informatics from the University of Coimbra. Professor Tavares specializes in embedded systems with particular expertise in: Embedded systems modeling and design System software design System-on-chip design Real-time operating systems Hardware acceleration and FPGA design Virtualization for embedded systems IoT frameworks and protocols His publication record demonstrates a strong research trajectory in hardware-software co-design, with recent work showing an increasing integration of machine learning techniques into embedded systems. His publications span theoretical frameworks to practical implementations addressing real-time performance, resource constraints, and security challenges. Among his scholarly metrics: h-index of 18 126 publications with 1148 citations 20 publications in Q1/Q2 journals Author of a book on microcontroller programming Professor Tavares has supervised students including Miguel Ângelo Fernandes Silva and has established international collaborations through the Erasmus Program with institutions in China, Iran, Thailand, Jordan, and Cambodia. He teaches advanced courses on embedded and real-time systems modeling, compiler design, system-on-chip design, real-time operating system design, and advanced computer architectures at University of Minho.
Kees Goossens is Full Professor of Real-time Embedded Systems in the Electronic Systems group at Eindhoven University of Technology (TU/e). He leads the CompSOC Lab focused on predictable and composable embedded systems. His research spans composable virtualization, real-time systems, low-power design, and FPGA-based dynamic partial reconfiguration. Previously at NXP Semiconductors, he pioneered networks-on-chip research including the Aethereal NoC architecture. His research interests include: Composable and predictable embedded systems Real-time networks-on-chip (NoC) Memory management and controllers FPGA reconfiguration Hardware verification Low-power electronic design Publication analysis shows consistent focus on real-time systems, networks-on-chip, memory controllers, and embedded systems design, with recent expansion into machine learning applications for networking and error-correction coding. His work frequently addresses automotive and industrial control applications. Editorial contributions include: ACM TODAES editorial board (since 2009) Associate editor for Springer DAEM journal (since 2006) Guest editor for multiple NoC special issues He leads the CompSOC laboratory developing virtualized execution platforms for mixed-criticality systems. Current educational activities include courses on Systems-on-Chip, Embedded Systems, and Computer Architecture.
Dr. Johannes Pfau serves as a Scientific Assistant at the Institute for Information Processing Technology (ITIV) within Karlsruhe Institute of Technology (KIT), working in Prof. Becker's research group. His position combines postdoctoral research in advanced FPGA architectures with teaching responsibilities including System-on-Chip internships and academic advising for specialized engineering tracks. Education: Doctorate (Dissertation) in Electrical Engineering and Information Technology, Karlsruhe Institute of Technology, 2024 Research Interests: Pfau's work centers on reconfigurable computing with three interconnected pillars: (1) Next-generation FPGA architectures using emerging technologies like RFETs that require fundamental toolchain redesigns; (2) Digital beamforming systems for satellite Earth observation that replace analog processing with FPGA-based solutions to enable on-orbit data compression; and (3) High-throughput data acquisition systems for 6G prototyping handling multi-100Gbps streams through RFSoC platforms. His research bridges semiconductor physics, hardware architecture, and practical applications in communications and remote sensing. Publication Trends: Pfau's 15 most recent publications (2021-2024) reveal a strong focus on practical FPGA implementations addressing real-world constraints. His work increasingly integrates power management (7 papers), 6G infrastructure (5 papers), and novel semiconductor technologies (4 papers), with a clear trajectory toward hardware solutions for satellite communications and next-generation wireless systems. The research demonstrates consistent progression from architectural innovations (RFET, V-FPGAs) to applied systems (beamforming, 6G testbeds). Advising and Mentorship: Pfau maintains an active student supervision portfolio with documented guidance of 7+ Bachelor's and Master's theses since 2021. His projects emphasize hands-on hardware development, spanning power management techniques, beamforming filter design, and prosthetic control systems. The academic advising role for specializations 13 and 21 positions him at the intersection of computer science and electrical engineering education. Research Context: As a core member of Prof. Becker's group at ITIV, Pfau contributes to KIT's leadership in reconfigurable systems research. The group maintains strong industry connections through 6G initiatives and satellite technology development, with Pfau's work directly supporting German and European efforts in secure communications infrastructure and Earth observation systems.
François-Raymond Boyer is an Associate Professor in the Department of Computer Engineering and Software Engineering at Polytechnique Montréal. He holds a B.Sc. and Ph.D. from Université de Montréal and teaches courses in programming and digital audio. His research spans: Computer architecture and VLSI systems Network processing and traffic management Digital audio signal processing Hardware acceleration and optimization He is affiliated with ReSMiQ (Strategic Cluster for Microsystems) and OICRM (Music Research Observatory). Recent publications focus on 5G network processing, modular programming frameworks, and high-speed traffic management architectures, primarily in IEEE Access and IEEE Transactions on VLSI Systems. Professor Boyer has supervised 3 PhD and 6 Master's students, with research topics including network architecture, audio processing, and hardware design. No scientific awards are mentioned in the available records.
Fredrik Kjolstad is an Assistant Professor in the Department of Computer Science at Stanford University, specializing in compilers and programming models for sparse computing and performance engineering. His research focuses on separating algorithms from data representations to enable portable applications across diverse hardware platforms. His research interests span compilers, programming models, performance engineering, and computer architecture, with particular emphasis on sparse tensor algebra, compiler design for heterogeneous systems, and high-performance computing. He has pioneered frameworks like TACO, Simit, and Distal that enable efficient sparse computations across CPUs, GPUs, and specialized accelerators. Dr. Kjolstad's publications demonstrate expertise in compiler optimization techniques for sparse data structures, tensor algebra, and distributed systems. His work consistently addresses the challenge of bridging high-level programming abstractions with efficient hardware execution across diverse architectures. MIT EECS First Place George M. Sprowls PhD Thesis Award NSF CAREER Award Rosing Award Adobe Fellowship Google Research Scholarship Best Paper Awards at EuroMPI 2013, OOPSLA 2017, and OOPSLA 2021 ISCA Distinguished Artifact Award PLDI and OOPSLA Distinguished Paper Awards He advises multiple PhD students including James Dong, Olivia Hsu, and Rohan Yadav, while leading research on compiler technologies that have received significant grant support. His group develops practical tools like the TACO compiler and Legate Sparse that are used in both academic and industrial settings. Current projects focus on programmable accelerators for sparse tensor algebra, distributed sparse computing, and compiler support for emerging hardware architectures.
Kunle Olukotun is a Professor of Electrical Engineering and Computer Science at Stanford University's School of Engineering, where he has been faculty since 1991. He directs the Stanford Pervasive Parallelism Lab (PPL) and co-leads the Transactional Coherence and Consistency (TCC) project. His research focuses on computer architecture, parallel programming environments, and scalable parallel systems. Key areas include chip multiprocessors (CMPs), transactional memory systems, domain-specific languages (DSLs) for heterogeneous computing, and hardware-software co-design for machine learning workloads. His work bridges theoretical foundations with practical systems implementation. Notable contributions include the Stanford Hydra research project (one of the first chip multiprocessors with thread-level speculation), founding Afara Websystems (acquired by Sun Microsystems), and developing the Niagara processor architecture. His DSL frameworks like Green-Marl and Spatial enable efficient graph analysis and hardware acceleration. His publications reveal strong trends in parallel systems evolution: from foundational CMP research (2000s) to transactional memory (2004-2010), then DSLs for heterogeneous computing (2010-2015), and currently foundation model systems (2023-2025). Subfield analysis shows consistent focus on hardware-software co-design, sparse computation, and compiler techniques across decades. ACM Fellow (2006) for contributions to multiprocessors on a chip and multi-threaded processor design Best Paper Award at IEEE International Symposium on Workload Characteristics (IISWC '10) for EigenBench Olukotun actively mentors researchers through the Stanford Pervasive Parallelism Lab (PPL), which seeks to proliferate parallelism across application domains. His projects have secured significant industry partnerships, including the acquisition of his startup Afara Websystems by Sun Microsystems. Current research focuses on compiler frameworks for foundation model systems and hardware acceleration for sparse machine learning workloads, supported by collaborations with major tech companies. He leads the Stanford Pervasive Parallelism Lab (PPL), which develops compiler and runtime systems for heterogeneous architectures. The lab's work spans DSLs, hardware acceleration, and parallel programming models, with strong industry ties to companies like NVIDIA and Google. Current initiatives include the Mosaic compiler framework and Stardust architecture for sparse tensor computation.
Prof. Eran Rabani is a distinguished researcher and professor holding dual appointments at Tel Aviv University's School of Chemistry and the University of California, Berkeley's Department of Chemistry. At UC Berkeley, he holds the prestigious Glenn T. Seaborg Chair in Physical Chemistry and serves as a Faculty Scientist at Lawrence Berkeley National Laboratory. His research bridges theoretical chemistry, computational physics, and nanomaterials science, with significant contributions to understanding quantum phenomena at the nanoscale. Prof. Rabani earned his Ph.D. in Theoretical Chemistry from The Hebrew University in 1996, followed by postdoctoral research at Columbia University. His academic career progressed from Senior Lecturer to full Professor at Tel Aviv University, where he has maintained a continuous appointment since 1993. His educational background includes a summa cum laude B.Sc. from the Special Program "Amirim" at The Hebrew University. Rabani's research program centers on three interconnected pillars: Optoelectronic Properties of Nanomaterials , where his group develops computational models to describe exciton fine structure and phonon interactions in nanocrystals; Quasiparticle Dynamics , investigating electron transfer processes in nanoscale systems; and Stochastic Electronic Structure Methods , pioneering computational approaches that dramatically reduce the complexity of quantum simulations. His work combines theoretical innovation with practical applications in renewable energy, sensing technologies, and quantum information processing. Analysis of Rabani's recent publications reveals a strong emphasis on quantum confinement effects, exciton dynamics, and the development of stochastic computational methods that enable simulations of previously intractable systems. His research demonstrates increasing interdisciplinary collaboration, particularly with experimental groups working on quantum dots, perovskites, and other nanomaterials, with a clear trajectory toward solving real-world problems in energy conversion and quantum technologies. Prof. Rabani's contributions have been recognized with numerous prestigious awards: International Association of Advanced Materials Fellow (2023) Humboldt Research Award (2022) Vebleo Fellow for Prominence and Leadership in Science (2021) Glenn T. Seaborg Chair in Physical Chemistry (2017) Baker Symposium Speaker at Cornell University (2016) Kavli Frontiers of Science Alumni (2015) Marko & Lucie Chaoul Chair for Theoretical and Computational Nanoscience (2013) His research program is supported by substantial funding from major agencies including the National Science Foundation, Department of Energy, and Israel Science Foundation. Current grants (2021-2025) total over $2.5 million, focusing on semiconductor nanowires, computational materials science, and optoelectronic materials. As Director of The Sackler Center for Computational Molecular and Materials Science at Tel Aviv University, he leads a vibrant research group that bridges theoretical innovation with experimental validation. Prof. Rabani directs The Sackler Center for Computational Molecular and Materials Science at Tel Aviv University and has served in various administrative roles including Vice President for Research and Development. His research group maintains strong collaborations with experimentalists worldwide, creating an intellectual community focused on advancing fundamental understanding of nanoscale phenomena while exploring practical applications in energy, sensing, and quantum technologies.
