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Marco Platzner is a Professor for Computer Engineering at Paderborn University , Germany. He serves as the Dean of Research for the Faculty of Computer Science, Electrical Engineering and Mathematics and heads the Department of Computer Science. Previously, he held research positions at ETH Zurich, Stanford University, GMD (now Fraunhofer IAIS), and Graz University of Technology. Education: Diploma and PhD in Telematics (Graz University of Technology, 1991 and 1996), Habilitation in Hardware-Software Co-Design (ETH Zurich, 2002) Research Interests focus on reconfigurable computing, approximate computing, self-* computing, and embedded systems. His work addresses hardware security, FPGA design, and sustainable AI in data centers. Current projects include energy-efficient AI through deep neural network approximation for FPGAs (EKI-App) and lifecycle sustainability of socio-technical systems (SAIL). Publication Trends show expertise in FPGA security, approximate circuit synthesis, robotics, and hardware acceleration. Collaborations span robotics (ROS 2 integration), AI (transformer optimization), and cybersecurity (Trojan detection). Scientific Awards: ACM SIGDA Hall of Fame (2020) Significant Paper Award (FPL 2015) Best Paper Awards at IEEE ISVLSI (2024), ARC (2018), IEEE ReConFig (2015), and others Weierstraß Prize for Teaching (2008) Leadership Roles include membership in the board of Paderborn Center for Parallel Computing (PC2) and the Jenny Aloni Centre for Early Career Researchers. He has contributed to EU FP7 FET project EPiCS and German priority programs on embedded systems and organic computing.

• Reconfigurable Computing
• Approximate Computing
• Self-Aware Computing
• +7 more

Prof. Dr. Amelie Hagelauer holds a professorship in Micro- and Nanosystem Technology at the TUM School of Computation, Information and Technology, Technical University of Munich. Her work focuses on advanced electronics and systems integration across quantum computing hardware, resistive memory technologies, and high-frequency RF systems. She has contributed to innovations in superconducting qubit readout architectures, multi-level RRAM designs, and 3D-integrated CMOS-compatible quantum devices. Research interests span quantum hardware design, nanoelectronic devices, RF front-end systems, and emerging memory technologies. Her work emphasizes practical implementation challenges such as low-power operation, high-voltage handling in RF switches, and wafer-scale fabrication processes. Recent projects include D-band radar systems, energy-efficient 60 GHz transceivers, and antenna tuning solutions for 5G applications. Publications from 2023-2025 showcase advancements in resistive switching device characterization, mitigation of TLS losses in superconducting qubits, and reconfigurable AI accelerators using RRAM-based digital twins. Her work bridges theoretical device physics with practical integrated circuit design, addressing scalability and reliability in next-gen electronics. Awards and grants: None explicitly listed in provided texts. Active collaborations include EU-funded projects on quantum computing platforms and TUM's Electronic Photonic Integration initiatives. Leads research teams in microsystem technology with emphasis on cross-disciplinary approaches combining CMOS processes, MEMS, and quantum engineering.

• Microelectronics
• Nanotechnology
• RF Engineering
• +3 more

Prof. Dr. Tobias Gemmeke is a University Professor at RWTH Aachen University's Faculty of Electrical Engineering and Information Technology, leading the Chair of Integrated Digital Systems and Circuit Design. His work focuses on neuromorphic computing, hardware accelerators, and energy-efficient electronics. He has pioneered advancements in FPGA-based computational neuroscience simulators, neuromorphic processor architectures, and sensor integration for industrial and medical applications. Research interests include time-domain computing, ReRAM reliability, and co-optimization of neural networks with hardware. Notable contributions include the neuroAIx framework for accelerated neuroscience simulations and energy-efficient ASIC designs for post-quantum cryptography. He actively explores memristive devices and domain generalization techniques for edge computing. Recent publications highlight innovations in spiking neural networks, sensor systems for plain bearings, and time-domain compute-in-memory engines. His work bridges theoretical neuroscience with practical hardware implementations, emphasizing scalability and real-time performance.

• Neuromorphic Computing
• Hardware Accelerators
• VLSI Circuits
• +5 more

Dr. Yiting Xia is a tenure-track faculty member at the Max Planck Institute for Informatics (MPI-INF), leading the Network and Cloud Systems research group. She previously worked as a research scientist at Facebook and holds a PhD in Computer Science from Rice University (2018) and a B.S. in Telecommunications Engineering from Beijing University of Posts and Telecommunications and Queen Mary University of London (2011). Her research focuses on high-performance and energy-efficient networking for cloud computing, including reconfigurable data center networks, optical communications, and network protocols. Notable contributions include innovations in transport protocols, time synchronization for optical networks, and failure-resilient network design. Education: PhD in Computer Science, Rice University, 2018 M.S. in Computer Science, Rice University, 2014 B.S. in Telecommunications Engineering, BUPT & QMUL, 2011 Research Interests: Data center networking, optical communications, cloud systems, network protocols, distributed systems, and network security. Her work bridges theoretical contributions with practical implementations, addressing challenges in latency-sensitive flows, traffic engineering, and system reliability. Awards include the Ken Kennedy-Cray Fellowship and the N2Women Rising Star Award (2021). She has co-lectured courses on distributed systems and data networks at Saarland University and previously contributed to teaching at Rice University. Key projects include Aurora (for MoE inference optimization), Lighthouse (an open research framework for optical networks), and Occam (a reliable network management system). Grants & Projects: Focus on deployable optical network architectures and resilient backbone management during pandemic-driven traffic shifts. Labs/Teams: Leads the Network and Cloud Systems group at MPI-INF, collaborating with academia and industry on cutting-edge networking solutions.

• Computer Networks
• Data Center Networking
• Optical Communications
• +3 more

Prof. Dr.-Ing. Jürgen Teich is a full Professor and Chair for Hardware-Software Co-Design at the Department of Computer Science, Friedrich Alexander University Erlangen-Nuremberg (FAU). He serves as Head of Department Computer Science and Vice Dean of the Technical Faculty since August 2024, and has been Speaker of the FAU Research Center Embedded System Initiative (FAU ESI) since 2023. His educational background includes: Diploma degree in Electrical Engineering, University of Kaiserslautern (1989) Dr.-Ing. degree in Electrical Engineering, University of Saarland (1993) Habilitation (PD Dr.-Ing.) entitled "Synthesis and Optimization of Digital Hardware/Software Systems" (1996) Prof. Teich's research focuses on Embedded Systems , Invasive Computing , Hardware-Software Co-Design , and Reconfigurable Computing . His work spans from theoretical foundations to practical implementations, with particular emphasis on resource-constrained systems, many-core architectures, and energy-efficient computing. He has pioneered research in invasive computing paradigms that enable more efficient use of many-core processors by allowing applications to dynamically claim resources. His recent publications reveal a strong trend toward energy-efficient AI deployment on embedded devices , security of embedded systems , and novel memory technologies . There's a clear focus on practical implementations of machine learning on microcontrollers (TinyML), hardware acceleration for data processing, and innovative approaches to power management in self-powered systems. Among his notable scientific awards are: IEEE Fellow (since 2018) Member of Academia Europaea, Section Informatics (since 2011) Member of the National Academy of Science and Engineering (acatech) (since 2018) Member of the German Society of Humboldtians (since 2021) Prof. Teich has been Principal Investigator for numerous DFG-funded projects including SFB/Transregio 89 "Invasive Computing" (2010-2022), SFB 694, and multiple priority programs. He has coordinated large collaborative research efforts across Germany and internationally, with significant funding from DFG and other sources. His research group has produced influential work in embedded systems design and co-design methodologies. He leads the Hardware-Software Co-Design research group at FAU, which focuses on innovative approaches to embedded system design, invasive computing architectures, and efficient implementation of machine learning on resource-constrained devices. The group maintains strong collaborations with industry partners including Intel, Xilinx, and automotive companies.

• Embedded Systems
• Hardware-Software Co-Design
• Invasive Computing
• +7 more

Akash Kumar is a Professor at Ruhr University Bochum, Germany, with affiliations to multiple institutions including TU Dresden and National University of Singapore. His research focuses on computer architecture, hardware acceleration, and approximate computing, with a strong emphasis on FPGA-based systems and neural network optimization. He has contributed extensively to embedded systems, mixed-criticality systems, and security in emerging technologies like reconfigurable nanodevices. His work spans cross-layer approximation methodologies, graph neural networks, and energy-efficient processing for edge AI. Collaborations with industry and academia highlight his leadership in VLSI design and secure hardware implementations. Notable contributions include frameworks for bounding time in mixed-criticality systems and resilient logic locking techniques. Research interests include hardware-software co-design, real-time systems, and efficient neural network architectures. His publications in top-tier conferences (DAC, DATE, FCCM) and journals (IEEE Trans. CAD, ACM TECS) underscore his impact in the field.

• Computer Architecture
• Hardware Acceleration
• Approximate Computing
• +3 more

Prof. Dr. Andreas Koch leads research on reconfigurable computing at TU Darmstadt, focusing on FPGA-based acceleration, heterogeneous architectures, and hardware/software co-design for database systems and embedded applications.

• Reconfigurable Computing
• FPGA Architectures
• Hardware Acceleration
• +1 more

Prof. Dr. Christian Plessl is a W3 Professor of High-Performance Computing at the Institute of Computer Science, University of Paderborn. He leads the Paderborn Center for Parallel Computing (PC²), a national HPC center within the NHR alliance. His roles include Director of PC², Board Member of the NHR association, and member of the Sonderforschungsbereich 901. Education: PhD (Dr. sc. ETH) in Computer Engineering, ETH Zürich (2006) MSc in Electrical Engineering, ETH Zürich (2001) Postdoc at ETH Zürich (2007–2011) Research Interests: Architecture and tools for high-performance parallel and reconfigurable computing, FPGA acceleration, quantum chemistry, scientific computing, adaptive systems, and energy-efficient HPC solutions. Key projects include EKI-App (FPGA-based neural networks), FPGA4XPCS (X-ray spectroscopy), and HighPerMeshes (unstructured grid frameworks). Publications: Over 100 peer-reviewed works, focusing on FPGA acceleration, HPC frameworks, and quantum computing. Recent trends emphasize energy-efficient neural networks, FPGA-based quantum computing, and scalable HPC algorithms. Awards: Best Paper Awards at HEART 2023, ReConFig 2012/2014 Paderborn University Research Awards (2018, 2009) SEW-EURODRIVE Student Award (2001) Grants & Projects: Principal investigator in DFG, BMBF, and EU-funded projects. Collaborates with AMD/Xilinx, Intel/Altera, and Fujitsu. Leads initiatives like PerficienCC (custom computing) and HighPerMeshes. Labs/Teams: Directs the High-Performance Computing group at PC², focusing on FPGA supercomputing and HPC infrastructure. Active in the NHR alliance for national HPC coordination.

• High-Performance Computing
• Reconfigurable Computing
• FPGA Acceleration
• +3 more

Prof. Tim Güneysu is a full Professor and Head of the Security Engineering department at the Faculty of Computer Science, Ruhr-Universität Bochum. He serves as Vice Dean for Strategy and Finances (since 2023) and previously as Speaker of the Horst-Görtz Institute for IT-Security (2020-2023). His academic journey includes roles as Associate Professor at the University of Bremen (2015-2017) and Assistant Professor at Ruhr-Universität Bochum (2011-2015). He also holds positions at the German Research Center for Artificial Intelligence (DFKI) and has conducted postdoctoral research at UMass Amherst. His research focuses on Security-by-Design principles, CAD for Security, and countermeasures against physical attacks. He emphasizes efficient cryptographic implementations and system-level hardware security. Key areas include post-quantum cryptography, side-channel resistant designs, and secure embedded systems. He has contributed over 200 publications in top venues, with recent work on FPGA-based cryptographic accelerators, secure hardware extensions (e.g., KeyVisor), and post-quantum algorithms for IoT. His research themes include agile signature acceleration, fault attack mitigation, and hardware-software co-design for security. Notable projects include CONVOLVE (edge-AI security) and QuantumRISC (quantum-safe systems). His work bridges theoretical cryptography with practical hardware implementations, emphasizing real-world security applications.

• Security Engineering
• Hardware Security
• Post-Quantum Cryptography
• +4 more

Stefan Wildermann is a Professor at Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), where he leads the Reconfigurable Computing Group within the Chair of Computer Science 12 (Hardware-Software Co-Design) in the Department of Computer Science. He has maintained continuous research activity at FAU since 2006, progressing from researcher to his current leadership position. Dr. Wildermann earned his Diploma degree in Computer Science from FAU in 2006 and completed his doctorate (Dr.-Ing.) in Computer Science at the same institution in July 2012. His academic career has been entirely rooted at FAU, demonstrating a strong institutional commitment and progression through the ranks. His research spans multiple cutting-edge areas in computer science and engineering, with particular emphasis on reconfigurable systems and hardware-software co-design. Wildermann's work in edge computing explores efficient processing at the network periphery, while his research in organic computing investigates self-organizing systems that can adapt to changing environments. His expertise extends to optimization techniques for embedded systems, applying game theory principles and convex optimization methods to solve complex resource allocation problems. More recently, he has integrated reinforcement learning approaches to enhance system adaptability and performance. His teaching portfolio includes courses on event-driven systems, computer engineering fundamentals, embedded systems, and hardware-software co-design. Analysis of Wildermann's publication record from 2021-2025 reveals a strong focus on hardware acceleration, security, and embedded systems. His work demonstrates consistent evolution from foundational research in reconfigurable architectures toward practical applications in IoT, robotics, and secure computing. A significant portion of his recent work addresses near-data processing using FPGAs for database acceleration, while maintaining parallel research streams in side-channel security analysis and energy-efficient embedded systems design. His publications frequently appear in top-tier conferences including DATE, FPL, ASP-DAC, and HOST, reflecting strong recognition within the computer architecture and embedded systems communities. Wildermann has held significant leadership roles including Head of the Reconfigurable Computing Group since 2015 and previously served as Head of the Self-organizing Systems Group (2012-2015) and Lab Leader of the Automotive Lab within the Embedded Systems Initiative (2016-2020). His research has been consistently funded through multiple projects investigating invasive computing, reconfigurable architectures, and embedded systems design methodologies. Currently based in Room 02.116 at Cauerstr. 11, 91058 Erlangen, Wildermann continues to lead active research in the Hardware-Software Co-Design group, supervising projects that bridge theoretical computer science with practical hardware implementation challenges.

• Reconfigurable Systems
• Edge Computing
• Organic Computing
• +7 more

Prof. Dr.-Ing. Richard Membarth is a Research Professor for System-on-a-Chip and AI at the Edge Computing at Technische Hochschule Ingolstadt (THI). He is affiliated with the Hardware-Software Co-Design group and holds a secondary position at the German Research Center for Artificial Intelligence (DFKI) Saarbrücken. Co-creator of DSL frameworks like AnyDSL and Hipacc Key contributor to MetaDL (AI metaprogramming) and PRIME (predictive rendering) His research bridges GPU computing , domain-specific languages , and compiler technology , with recent work on Vulkan SPIR-V compilation and device-driven SpMV algorithms . Notable awards include the HiPEAC Paper Award (2018) and multiple Best Paper Awards for his compiler frameworks.

• GPU Computing
• Parallel Computing
• Domain-Specific Languages
• +5 more

Nele Mentens is a full professor at both KU Leuven and Leiden University, where she leads cutting-edge research in applied cryptography, hardware security, and secure embedded systems. At KU Leuven, she is affiliated with the Faculty of Engineering Technology and the Electrical Engineering Department (ESAT), leading the Emerging Technologies, Systems & Security (ES&S) research group at the Diepenbeek campus. Simultaneously, she holds a full professorship at Leiden University’s Leiden Institute of Advanced Computer Science (LIACS), focusing on applied cryptography and security. She has been instrumental in numerous national and international research initiatives, including Horizon Europe and NWO-funded projects. Full Professor, KU Leuven (since 2023) Full Professor, Leiden University (since 2020) Associate Professor, KU Leuven (2014–2023) Post-doctoral Researcher & Lecturer, KHLim / KU Leuven (2007–2014) Ph.D. in Engineering Science, KU Leuven (2007) M.Sc. in Electrical Engineering, KU Leuven (2003) Her research focuses on secure and efficient hardware design, particularly for cryptographic applications on FPGAs, reconfigurable architectures, IoT security, and neuromorphic computing. She explores physical attack resistance, side-channel analysis protection, and trusted computing architectures, with applications in healthcare, industrial monitoring, and endpoint AI. Her work bridges theoretical cryptography with practical hardware implementations, emphasizing energy efficiency and real-time performance. The 15 most recent publications reflect a strong trend toward secure, energy-efficient, and intelligent embedded systems. Topics include neuromorphic AI accelerators, trusted IoT architectures, dynamic reconfiguration for side-channel protection, and secure medical data processing. These works span disciplines such as computer architecture, cybersecurity, digital design, and embedded systems, with a focus on hardware-software co-design and real-world deployment. Nele Mentens has received recognition for her contributions, including: Best Paper Award, DATE'16 Best Paper Nomination, AsianHOST'17 Best Paper Award, CHES'19 She has supervised over 15 Ph.D. students and post-docs, both current and former, and has served as principal investigator in approximately 25 funded research projects. Her work has attracted significant grants from Horizon Europe, NWO, FWO, and national innovation programs. She actively contributes to the academic community through editorial roles in top journals and leadership in major conferences. Nele Mentens leads the ES&S research group at KU Leuven and collaborates closely with LIACS at Leiden University. Her team includes Ph.D. students, post-docs, and research experts working on projects like NimbleAI, NeuroSoC, and TrustedIoT. She has also established secure electronics labs through infrastructure grants and maintains strong international ties with institutions such as EPFL, Ruhr University Bochum, and ETH Zurich.

• Applied Cryptography
• Hardware Security
• Secure Coprocessor Design
• +12 more

Heiner Giefers is a Professor for Cloud Computing at the Department of Computer Science and Natural Sciences at Southwestphalia University of Applied Sciences since 2018. Prior to this position, he worked as a Research Staff Member at IBM Research - Zürich (2013-2018), focusing on hardware acceleration in cloud environments, implementation of big data algorithms on FPGAs, and development of hardware platforms for approximate and in-memory computing. Dr. Giefers received his doctorate (Dr. rer. nat.) from Universität Paderborn in 2012 with a dissertation titled "Design and Programming of Reconfigurable Mesh based Many-Cores." His academic journey at Universität Paderborn includes serving as an Academic Council Member (Akademischer Rat a.Z.) from 2008-2013 and as a Scientific Staff Member from 2006-2012, where he taught digital technology and computer architecture. Professor Giefers' research focuses on energy-efficient computing, particularly through hardware acceleration using FPGAs for cloud and AI workloads. His work spans cloud computing infrastructure, hardware-software co-design, approximate computing, in-memory computing, and energy-efficient implementations of machine learning algorithms. He has made significant contributions to the field of reconfigurable hardware for high-performance computing applications. His recent publications show a strong trend toward applying hardware acceleration techniques to artificial intelligence and machine learning workloads, with a particular focus on energy efficiency. His work bridges the gap between theoretical computer science and practical hardware implementation, often resulting in patented technologies that address real-world computing challenges in cloud environments. Best Paper Award for "Stochastic Matrix-Function Estimators: Scalable Big-Data Kernels with High Performance" (2016) Best Paper Award Nomination for "Energy-Efficient Stochastic Matrix Function Estimator for Graph Analytics on FPGA" (2016) Best Paper Award Nomination for "Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system" (2014) Best Paper Award Nomination for "A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier" (2010) Professor Giefers actively supervises numerous Bachelor's and Master's students, with over 50 completed theses covering topics from machine learning and cloud computing to IoT systems and hardware acceleration. He leads the "Energy-efficient AI" project (eki), which aims to increase the energy efficiency of AI systems through approximation techniques for FPGA implementation. Additionally, he collaborates with Prof. Dr. Christian Plessl on the "Digital teaching materials with Jupyter Notebooks" project, creating interactive learning materials that integrate teaching content, program code, and results into a single document. His work extends to practical applications through multiple patents related to FPGA implementations, neural networks, and memory systems, demonstrating his commitment to translating research into real-world solutions.

• Cloud Computing
• Hardware Acceleration
• Field-Programmable Gate Arrays
• +7 more

Prof. Dr. Andreas Herkersdorf is a Full Professor and Chair of Integrated Systems at the Technical University of Munich (TUM) School of Computation, Information and Technology. His research focuses on application-specific multicore processors (MPSoC), FPGA-based prototyping, fault-tolerant systems, and energy-efficient architectures, with applications in IP packet processing, automotive systems, and visual computing. He has received multiple IBM innovation awards and serves on editorial boards including the DFG Review Board for computer architecture. Education: Dipl.-Ing. Electrical Engineering (TUM, 1987), Dr. techn. Electrical Engineering (ETH Zurich, 1991) Research: MPSoC architectures, autonomic computing, NoC resilience, FPGA acceleration, and self-optimizing systems. Awards: IBM Master Inventor (1998), IBM Outstanding Technical Achievement Award (2001), multiple IBM Innovation Achievement Awards (1996-2003) His recent publications emphasize hardware/software co-design, machine learning integration for runtime optimization, and network-on-chip innovations. He collaborates on projects involving 6G systems, smartNICs, and automotive communication protocols.

• Computer Architecture
• Embedded Systems
• Network-on-Chip (NoC)
• +4 more

Prof. Dr. Haris Gačanin is a faculty member at RWTH Aachen University, affiliated with the Institute for Distributed Signal Processing under the College of Electrical Engineering. His research focuses on integrating machine learning with wireless communication systems, particularly in industrial IoT, edge computing, and network optimization. Current academic rank: Professor Contact: harisg@dsp.rwth-aachen.de Research Interests: Wireless systems, machine learning, signal processing, and network optimization. Key contributions include: Adaptive resource allocation in IIoT and vehicular networks AI-driven channel estimation and feedback mechanisms Security-oriented emitter identification via metric learning Federated/transfer learning for edge environments Hardware-efficient deep learning models for mmWave and THz communications Methodological Focus: Combines reinforcement learning, attention mechanisms, and robust neural architectures with practical implementations on FPGA and vehicular systems.

• Wireless Communication
• Machine Learning
• Signal Processing
• +4 more