Binoy Ravindran is a Professor and Bradley Senior Faculty Fellow in the Department of Electrical and Computer Engineering at Virginia Tech, where he leads the Systems Software Research Group. He holds a Ph.D. from The University of Texas at Arlington (1998). His research focuses on computer systems, emphasizing security, performance, energy efficiency, and timeliness in areas like concurrent, heterogeneous, distributed, and real-time computing. Recent projects include the Low-level Reasoning Machine (LLRM), Popcorn Linux, and LibrettOS. He teaches courses such as ECE/CS 5510 (Multiprocessor Programming), ECE/CS 5544 (Compiler Optimizations), and ECE 5984/SS (Modern Binary Exploitation). His service roles include editorial board positions at IEEE Transactions on Cloud Computing and ACM Transactions on Embedded Computing Systems, and he co-chaired ACM Systor 2025. Ravindran has published over 330 papers, earning nine best paper awards, and has mentored 26 PhD students, 23 postdocs, and 11 research faculty. Notable honors include ACM Distinguished Scientist and an Office of Naval Research Faculty Fellowship. His research group explores projects like LLRM (binary security verification), Popcorn Linux (heterogeneous ISA systems), and KairosVM (real-time hypervisor). Recent advancements include Stramash OS (ASPLOS'25) and Hexo (DOD infrastructure offloading).
Aravind Prakash is an Associate Professor in the Department of Computer Science at Binghamton University (SUNY). He holds a PhD from Syracuse University (2015) and has over a decade of industry experience in software programming and computer security. His research focuses on computer system security, particularly binary analysis, software security, and reverse engineering. He develops automated tools to dissect software programs using program analysis and hardware features, with recent work on C++ reverse engineering, software debloating, and RISCV security. He has received the NSF CAREER Award and collaborates with sponsors like NSF, DARPA, ONR, and RBC. Education: PhD in Computer Science from Syracuse University (2015). Research Interests: Memory forensics, virtualization-based security, binary reverse engineering, C++ reverse engineering, software debloating, and RISCV hardware-software security. His work combines program analysis with hardware features to enhance software security. Recent research trends include applying machine learning (e.g., CNN architectures for protein function prediction) alongside traditional security topics like exploit mitigation and tagged architectures. His publications span both security fundamentals and interdisciplinary applications. Awards: NSF CAREER Award. Advising & Grants: Advised multiple PhD and MS students, with current openings for RA positions. Active grants from NSF, DARPA, and ONR fund his research on binary-level security and system integrity. Labs & Teams: Leads a research group focusing on program analysis and system security at Binghamton University's School of Computing.
Peter Rugg is a Researcher at the Department of Computer Science and Technology, University of Cambridge. His primary focus is on applying the CHERI security architecture to the RISC-V instruction set, advancing hardware-software co-design for secure computing. He holds a PhD thesis available via Apollo and technical reports. Teaching contributions include supervising Part II projects such as 'Parallelising Sequence Alignment' (2019-20) and 'Dynamic Binary Translator from Arm to RISC-V' (2020-21). He has also taught courses on Digital Electronics, Discrete Mathematics, Computer Architecture fundamentals, Cybersecurity principles, Cryptography, Hoare Logic, and Model Checking. Affiliated with the William Gates Building at the University's main campus, Rugg's work bridges academic research and practical implementation in secure processor architectures.
Christopher Batten is a Professor of Electrical and Computer Engineering at Cornell University, affiliated with the Computer Science department. He leads the Batten Research Group within the Computer Systems Laboratory (CSL), focusing on computer architecture, electronic design automation, and VLSI systems. His work spans programmable accelerators, interconnection networks, and agile chip design methodologies. Batten holds a PhD from MIT, an M.Phil. from the University of Cambridge, and a B.S. from the University of Virginia. He has held visiting roles at UC Berkeley and NVIDIA. Research Interests: Computer Architecture: Accelerators, interconnection networks, and emerging technologies VLSI Design: Agile methodologies, chip prototyping, and physical design Hardware-Software Co-Design: Parallel programming frameworks and productivity tools Recent Work: Focuses on optical interconnects, 3D integration, and AI-driven hardware design. Led projects like Cornell Custom Silicon Systems (C2S2), which taped out multiple chips in SkyWater 130nm. Collaborates with industry partners like NVIDIA and Meta. Awards: Recognized with the ACM/IEEE MICRO Hall of Fame, NSF CAREER Award, and multiple teaching accolades. His group emphasizes student-led chip projects and open-source frameworks like PyMTL3. Grants & Sponsors: Supported by NSF, DARPA, AFOSR, and industrial partners including Intel, NVIDIA, and Xilinx. Current efforts include NSF CSSI projects improving gem5 and NSF Panorama for pangenomics.
Nektarios Kozyris is a Professor of Computer Science and former Dean of the School of Electrical and Computer Engineering at the National Technical University of Athens (NTUA). He holds a PhD and Diploma in Electrical and Computer Engineering from NTUA. His research focuses on parallel and distributed systems, computer architecture, high-performance computing, and cloud infrastructure. He has authored over 180 papers and contributed to major projects like the Okeanos public cloud and Synnefo open-source software. Kozyris has led EU initiatives such as ACTiCLOUD and EuroEXA, and advises startups like Arrikto. He is a senior member of the ACM, IEEE Computer Society, and co-founder of the Greek Free/Open Source Software Society (GFOSS). His academic roles include teaching courses on computer architecture, operating systems, and distributed systems. Awards include Best Paper Awards at IPDPS 2001 and CCGRID 2013, and Intel's recognition for research in transactional memory. He actively contributes to conferences as a PC member and co-chair, and has supervised numerous PhD students in areas like distributed systems and sparse matrix computations. Kozyris pioneered the ~okeanos cloud infrastructure and advanced storage systems like Pithos. His work on GridTorrent and XOROS demonstrates innovation in data management and peer-to-peer systems. Current research includes elastic resource provisioning, quantum machine learning, and FPGA-based acceleration. His labs at NTUA and collaborations with institutions like ICCS and IMIS drive advancements in computing systems and software engineering.
Todd Austin is the S. Jack Hu Collegiate Professor of Electrical Engineering and Computer Science at the University of Michigan's College of Engineering. His research focuses on secure computer architecture and hardware-software co-design for security-critical systems. His primary research interests include computer architecture , hardware security , secure system design , and side-channel protection . Austin's work emphasizes practical solutions for real-world security challenges through hardware-software co-design and formal verification techniques. Recent publications (2022-2025) demonstrate a strong focus on data-oblivious execution , moving target defenses , and hardware-based security primitives . Key themes include eliminating side-channel leakage through program transformations, sequestered encryption techniques, and architectural support for vulnerability-tolerant systems. Austin maintains active research engagement through his Austin-Lab and open-source contributions, including the widely-forked bringup-bench repository for CPU and system validation. Contact: austin@umich.edu | Office: 4637 BBB, 2260 Hayward Avenue, Ann Arbor, MI 48109-2121 | Phone: 734-936-0370
Marco Guarnieri is an Associate Research Professor at the IMDEA Software Institute in Spain. He holds a PhD in Computer Science from ETH Zurich (2017), an MSc in Computer Engineering from the Università degli Studi di Bergamo (2012), and a BSc in Computer Engineering from the same institution (2010). His research focuses on secure hardware-software co-design, microarchitectural side-channel attacks, and formal methods for verifying security guarantees. Education : PhD in Computer Science, ETH Zurich (2017) MSc in Computer Engineering, Università degli Studi di Bergamo (2012) BSc in Computer Engineering, Università degli Studi di Bergamo (2010) Research Interests : Security, privacy, programming languages, formal methods, and microarchitectural security. His work emphasizes practical systems for securing sensitive data storage and processing, with recent focus on leakage contracts for open-source processors and automated testing of secure speculation countermeasures. Awards : Best Paper Award at CCS 2024 for work on leakage contracts for RISC-V processors Distinguished Paper Award at CCS 2023 for Spectre attack detection Best Paper Award at S&P 2021 for hardware-software contracts for secure speculation Grants & Advising : He leads a research group at IMDEA, actively mentoring PhD students and postdocs in hardware-software security. His projects include AMuLeT (automated testing of secure speculation) and LeaVe (verifying leakage contracts). Labs/Teams : IMDEA Software Institute’s security research group, focusing on cross-layer hardware-software security solutions.
Christos-Efthymios Kotselidis is an Associate Professor in the Department of Computer Science at the University of Manchester. His work focuses on runtime systems, heterogeneous computing, and high-performance computing. He leads research in optimizing Java programs using frameworks like TornadoVM and explores GPU acceleration for cryptography (FHE). His contributions include advancements in vectorization for RISC-V architectures and memory analysis of Java benchmarks. Education: PhD in Computer Science (2011) from the University of Manchester, supervised by Prof. Steve Furber and Dr. Chris Kirkham, with a thesis on Distributed Software Transactional Memory. Research Interests: Runtime environments, parallel programming models, compiler optimization, and hardware-software co-design. His work aligns with UN SDG 9 (Industry, Innovation, and Infrastructure) through digital futures research. Notable Achievements: Recipient of the Best Paper Award (2017) Principal Investigator in the Centre for Digital Trust and Society (2021–present) Over 49 peer-reviewed publications, including books and conference contributions on topics like FHE acceleration and runtime systems Lab/Team Affiliations: Member of the Advanced Processor Technology group and collaborates on the Digital Futures research beacon at the University of Manchester.
Björn Lundell is a Professor of Computer Science at the University of Skövde's School of Informatics. His research focuses on open source software, ICT standards, software engineering practices, and their applications in public sector and industrial contexts. He is actively involved in projects addressing challenges like standard compliance, lock-in effects, and sustainable digitalization. Lundell has collaborated extensively with organizations such as Combitech, Saab, and Husqvarna, and his work often bridges academic research with practical industrial needs. Key areas of research include open source ecosystems, governance of software standards, and cybersecurity in public sector IT. He has contributed to major initiatives like the EDU4Standards project (EU Horizon 2020) and the ORIOS project on open source reference implementations. His work emphasizes long-term maintenance of digital assets, interoperability, and compliance with regulations like the Cyber Resilience Act (CRA). Lundell has authored over 150 publications in journals like IEEE Software and Empirical Software Engineering, and conferences such as EGOV and OpenSym. His recent focus includes GenAI data governance, SaaS contract terms in public sectors, and IoT standardization. He serves as an advisor to governmental bodies, including the Swedish Public Procurement Agency, and has provided expert opinions on IT policy frameworks. Grants and projects include leadership in the LIM-IT (2016–2020) and SUDO (2020–2024) initiatives, addressing lock-in effects and sustainable innovation. His research team collaborates internationally, with partners in academia and industry across Europe and beyond.
Yunsi Fei is a Professor in the Electrical and Computer Engineering Department at Northeastern University, serving concurrently as Associate Dean of Faculty Affairs. She leads the Northeastern site of the NSF IUCRC Center for Hardware and Embedded System Security and Trust (CHEST). Her research focuses on hardware-oriented security, computer architecture, embedded systems, and IoT security, with significant contributions to mitigating side-channel and fault attacks on neural networks and hardware systems. Fei holds a PhD in Electrical Engineering from Princeton University (2004), and bachelor’s and master’s degrees in Electronic Engineering from Tsinghua University. She joined Northeastern in 2011 after faculty roles at the University of Connecticut. Her research interests span secure computer architecture, energy-efficient embedded systems, and underwater sensor networks. Notable projects include RINGS (a NSF-funded IoT resilience initiative) and secure RISC-V processor design. She has received the NSF CAREER Award and multiple best paper awards at top conferences. Fei’s work integrates hardware-software co-design to address vulnerabilities in AI accelerators and cryptographic systems. She leads the Energy-Efficient and Secure Systems (ENESS) Lab and collaborates with industry and academia through CHEST. Recent grants include $1.5M for cybersecurity in additive manufacturing and $1M for spectrum-agile IoT systems. Her awards include a 2023 Distinguished Paper Award (AsiaCCS) and 2022 Best Paper (Great Lake VLSI). She mentors students like Ruyi Ding, who joined LSU as faculty in 2025. Fei also chairs sessions on hardware security and is an affiliated faculty member with Northeastern’s Institute of Information Assurance.
Barton P. Miller is a Vilas Distinguished Achievement Professor and the Amar & Balinder Sohi Professor of Computer Sciences at the University of Wisconsin, Madison, where he has made significant contributions to computer science research and education. As a faculty member in the Computer Sciences Department within the College of Engineering, he directs major research initiatives including the Paradyn Tools project and leads cybersecurity efforts as Chief Scientist of the DHS-funded Software Assurance Marketplace (SWAMP) research center. Miller received his B.A. degree from the University of California, San Diego in 1977, and M.S. and Ph.D. degrees in Computer Science from the University of California, Berkeley in 1980 and 1984. His educational background laid the foundation for his pioneering work in software testing and analysis. His research spans multiple critical areas of computer science, with a primary focus on binary code analysis and instrumentation , software security , and distributed and parallel program performance . Miller is particularly renowned for founding the field of Fuzz random software testing in 1988 and dynamic binary code instrumentation in 1992. His work bridges theoretical computer science with practical applications, addressing real-world challenges in high-performance computing systems, cybersecurity, and scalable distributed systems. His research has direct applications in national security through his work with DHS and TrustedCI, the NSF Cybersecurity Center of Excellence. Miller's publications reveal a consistent focus on binary analysis tools, security vulnerability detection, and performance optimization techniques. His recent work shows increasing emphasis on ransomware analysis, GPU performance optimization, and practical security tool development for developers. The trajectory of his research demonstrates how foundational work in binary instrumentation has evolved to address contemporary cybersecurity challenges while maintaining relevance to high-performance computing environments. Among his notable honors, Miller is a Fellow of the ACM and recipient of the prestigious Jean-Claude Laprie Award in Dependable Computing , an R&D 100 Award , and multiple best paper awards including at HPDC 2009 and CCGrid 2018. His contributions to the field have been recognized through distinguished lectureships at institutions including Ben Gurion University and IBM T.J. Watson Research Center. As an educator, Miller has mentored numerous students and taught courses spanning operating systems, software security, and distributed systems. He has received teaching awards and developed educational resources including free and open software security training materials. His work with TrustedCI has focused on cybersecurity for scientific communities, helping researchers secure their computational infrastructure while maintaining research productivity. Miller also co-directs the MIST software vulnerability assessment project in collaboration with colleagues at the Autonomous University of Barcelona. Miller directs the Paradyn Tools project, which investigates program scalability and binary program analysis technologies for use in HPC, systems design, and cyber-security. His work extends to practical applications through collaborations with government agencies including DHS and the U.S. Secret Service Electronic Crimes Task Force. His research group has developed tools like Dyninst, MRNet, and the Wisconsin Safety Analyzer that have become foundational in their respective domains.
Prof. Hussam Amrouch is a Full Professor of AI Processor Design at the Technical University of Munich (TUM), leading the TUM School of Computation, Information and Technology. His research focuses on ultra-efficient embodied AI, reliable designs in emerging technologies, and cryogenic circuits for quantum computing. He holds a Dr.-Ing. from Karlsruhe Institute of Technology (2015, Summa cum Laude) and previously led the "Dependable Hardware" group at KIT and the Chair of Semiconductor Test and Reliability at University of Stuttgart. He is affiliated with Munich Quantum Valley (MQV) and Munich Institute of Robotics and Machine Intelligence (MIRMI). Research interests include ferroelectric FETs, in-memory computing, cryogenic electronics, and neuromorphic systems. Key achievements include 10× HiPEAC Paper Awards, 3× DAC/DATE best paper nominations, and pioneering work on FeFET-based AI accelerators. His work bridges nanoelectronics with AI, addressing challenges in energy efficiency, reliability, and quantum integration. Publications span cutting-edge topics like cryogenic FinFETs, hyperdimensional computing, and monolithic 3D integration. He has developed novel testing methodologies, self-aware silicon systems, and energy-efficient architectures for edge-AI. Current projects explore cryogenic circuit design, radiation-resistant FeFETs, and carbon-efficient 3D neural networks. His awards reflect contributions to high-performance and embedded architectures. Research groups under his leadership focus on device-level innovations and system-level integration of emerging technologies. He actively contributes to interdisciplinary initiatives at MQV and MIRMI, advancing quantum computing and AI hardware frontiers.
Ileana Buhan is an Assistant Professor at Radboud University Nijmegen's Digital Security Group and a member of the CESCA Lab. Her research focuses on hardware security, particularly advancing tools for secure hardware design and mitigating side-channel vulnerabilities. She previously held roles at Riscure (2011–2020) as a security evaluation manager and product manager, and at Philips Research (2008–2010) as a senior scientist. She earned her Ph.D. in Cryptography with Noisy Data from the University of Twente in 2008, recognized with the 2008 EBF European Biometrics Research Industry Award. Her work emphasizes practical security evaluation methods, automated leakage modeling (e.g., ABBY tool), and hardware-software co-design for resistance against side-channel attacks. She actively contributes to conferences like CHES, FDTC, and CARDIS, often in program committee roles. Recent invited talks include topics such as AI-driven vulnerability prediction, architecture-level simulators for root cause analysis, and automated tools for cryptographic implementation security. Her research spans RISC-V processors, microarchitecture analysis, and the intersection of machine learning with hardware security. Notable contributions include frameworks for leakage detection, fault simulation, and explainable side-channel analysis. She balances academic rigor with industry relevance, aiming to bridge gaps between theoretical security and real-world implementation challenges.
Wei Yang is an Associate Professor in the Department of Computer Science at the University of Texas at Dallas, working within the Erik Jonsson School of Engineering and Computer Science. He holds a regular faculty position with an office in ECSS 4.225 and is actively engaged in teaching, research, and mentoring graduate students. His academic journey spans multiple prestigious institutions, and he currently serves on editorial boards for major software engineering journals. Dr. Yang received his Ph.D. in Computer Science from the University of Illinois at Urbana-Champaign in 2018, advised by Prof. Carl A. Gunter and Prof. Tao Xie. He earned his M.S. in Computer Science from North Carolina State University in 2013 under Prof. Tao Xie, and his B.E. in Software Engineering from Shanghai Jiao Tong University in 2011 under Prof. Jianjun Zhao. He was also a visiting researcher at the University of California, Berkeley, invited by Prof. Dawn Song. Dr. Yang's research spans multiple cutting-edge areas at the intersection of software engineering and security. His primary focus centers on software engineering for AI systems , particularly addressing challenges in deploying AI on edge devices like mobile phones, IoT devices, and autonomous vehicles. His pioneering work on efficiency robustness (initiated in 2019) explores how different inputs can trigger varying computational costs in neural networks, leading to novel attacks and defenses. He also develops infrastructure support for AI deployment , including compiler toolchains for dynamic-shaped neural networks and security analysis for IoT deployments. His research extends to mobile testing (since 2012), malware detection using expectation context analysis, and intelligent tools for software engineers and security researchers. Dr. Yang's publication record demonstrates a clear trajectory toward addressing critical challenges in AI security and efficiency. His recent work shows increasing focus on foundation models, large language models, and their security implications, while maintaining strong connections to practical software engineering challenges. The publications reveal a consistent pattern of high-impact research in top-tier venues across software engineering, AI, and security domains. NSF CAREER Award (2022) ACM SIGSOFT Distinguished Paper Award (2021) Amazon Research Award Dr. Yang actively mentors a large group of graduate and undergraduate students, with several PhD students currently working under his supervision. He serves as a faculty advisor for the ASTRO (AI Security and Trustworthiness Operations) team, which was selected as a red teaming participant in the Amazon Nova AI Challenge. His research is supported by significant grants, including the NSF CAREER award providing approximately $500,000 over five years. He emphasizes practical student development, helping them navigate the job market and transition from academic training to professional careers. Dr. Yang leads a vibrant research group focused on software engineering and security challenges in AI systems. His team, including the ASTRO group participating in the Amazon Nova AI Challenge, develops innovative techniques for testing, securing, and improving AI-based systems. The research environment fosters collaboration across multiple domains, with students working on projects ranging from mobile security to foundation model engineering.
Juan Jose Costa Prats is a researcher in the Department of Computer Architecture at the Universitat Politècnica de Catalunya (UPC), affiliated with the Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona. He is a key member of the CRAAX - Centre de Recerca d'Arquitectures Avançades de Xarxes, contributing to advanced research in computing systems and network architectures. His work is deeply integrated into competitive R&D projects, including Horizon Europe and national initiatives focused on digital innovation and infrastructure. Research Interests: Costa Prats specializes in high-performance and distributed computing, with a strong focus on parallel programming models (especially OpenMP), software distributed shared memory (SDSM), cloud computing, virtualization, and cybersecurity. His recent work emphasizes secure and resilient computing systems, particularly through RISC-V-based architectures, hypervisor extensions, and runtime malware detection using opcode analysis and machine learning. He also contributes to educational innovation through remote datacenter laboratories. Publication Trends: His recent publications (2021–2024) reflect a shift toward secure, trustworthy computing environments, especially in cloud and IoT contexts. Themes include RISC-V virtualization, intrusion detection using transfer learning, GPS spoofing detection, and secure development frameworks like Vitamin-V. These works highlight a convergence of system architecture, security, and machine learning. Scientific Awards: No specific awards mentioned in the provided text. Advising and Grants: While no formal students are listed, Costa Prats collaborates extensively with leading researchers such as Beatriz Otero, Ramon Canal, and Javier Verdú. He participates in numerous competitive R&D+i projects funded by the Spanish government and the European Union, including Horizon Europe, RIS3CAT, and national research programs, focusing on cloud resilience, intelligent cloud management, and RISC-V ecosystem development. Labs and Teams: He is an active member of the CRAAX research group at UPC, which works on advanced computing architectures. His research often involves collaboration with the Barcelona Supercomputing Center. His projects, such as Vitamin-V and Remote DasaLAB, indicate involvement in both secure computing environments and innovative educational platforms.
