Find Academic Supervisors

Goran ĐambićView profile

Associate Professor

• Information Sciences
• Computer Science
• Machine Learning
• +4 more

Assoc. Prof. Dr. Sc. Goran Đambić is an Associate Professor at Algebra University in Croatia, focusing on information sciences , computer science , and digital technologies applied to education and social/economic challenges. His work bridges software engineering , machine learning , and cybersecurity with pedagogical innovation in higher education. MSc in 2007, Faculty of Electrical Engineering and Computing, Zagreb His research emphasizes machine learning and automated assessment in education (via systems like AcpSQL), cybersecurity (honeypots), and IoT applications for environmental monitoring. He has published over 25 scientific papers and contributed to advancements in Kubernetes orchestration , ARM/RISC-V architectures , and LPWAN networks . Recent publications highlight trends in AI-driven education , smart public transport , and secure business systems . His work spans SQL query evaluation , containerization , and blockchain applications in communication systems. As a lecturer and researcher, he has held roles at Algebra University since 2007, advancing from lecturer to assistant professor and scientific associate . While no specific scientific awards are listed, his career reflects continuous engagement in digital transformation and pedagogical innovation .

• Information Security
• Cryptology
• Embedded Systems
• +5 more

Prof. Dr. Sıddıka Berna Örs Yalçın is a Professor at Istanbul Technical University , Faculty of Electrical and Electronics Engineering, Department of Electronics and Communication Engineering since 2020. She holds a PhD from Katholieke Universiteit Leuven (1999) and has maintained continuous academic engagement in cryptology, embedded systems, and hardware security. Education: PhD in Electrical Engineering, Katholieke Universiteit Leuven (1999) Master's in Electronics and Communications Engineering, Istanbul Technical University (1995) Licence in Electronics and Communication Engineering, Istanbul Technical University (1995) Her research focuses on post-quantum cryptography , side-channel attack mitigation , and hardware implementation for security systems. Recent work includes FPGA-based AI accelerators, IoT power consumption modeling, and quantum-resistant cryptographic algorithms. Current projects center on RISC-V processor optimization, embedded security, and hardware implementations for 5G communications. Her Scopus h-index is 17 with over 1353 citations, reflecting her impact in computer hardware and cryptographic engineering domains. Notable Research Outputs: Quantum tent map-based S-box designs for image encryption (2024) Post-quantum modular multiplication algorithms (2024) RISC-V implementation of CRYSTALS-Kyber (2023) IOT power consumption estimation frameworks (2024)

• Heterogeneous computing systems
• High-level synthesis (HLS)
• Hardware specialization for machine learning
• +3 more

Zhiru Zhang is a Professor at Cornell University in the School of Electrical and Computer Engineering , leading research at the Computer Systems Laboratory . His work focuses on algorithms, methodologies, and design automation tools for heterogeneous computing systems. Recent publications emphasize high-level synthesis (HLS), hardware specialization for machine learning, and programming models for software-defined FPGAs. Education: Ph.D. in Computer Science, UCLA B.S. in Computer Science, Peking University M.S. in Computer Science, UCLA Research Interests: Heterogeneous computing systems High-level synthesis (HLS) optimization FPGA-based hardware acceleration Sparse data format compilers Machine learning for electronic design automation Scientific Awards: IEEE Fellow Intel Outstanding Researcher Award NSF CAREER Award DARPA Young Faculty Award Multiple Best Paper Awards at ASPLOS, ISPD, FPGA, AutoML, FCCM Research Group: Mentors 12 current students including Jordan Dotzel, Jie Liu, and Grace Dinh, with 14 alumni now at institutions like AWS AI, NVIDIA, Google DeepMind, and Microsoft. His lab develops tools like UniSparse for sparse format customization, presented at OOPSLA'24 and IEEE CAL.

Binoy RavindranView profile

Professor

• Computer Systems
• Operating Systems
• Concurrency
• +7 more

Binoy Ravindran is a Professor and Bradley Senior Faculty Fellow in the Department of Electrical and Computer Engineering at Virginia Tech, where he leads the Systems Software Research Group. He holds a Ph.D. from The University of Texas at Arlington (1998). His research focuses on computer systems, emphasizing security, performance, energy efficiency, and timeliness in areas like concurrent, heterogeneous, distributed, and real-time computing. Recent projects include the Low-level Reasoning Machine (LLRM), Popcorn Linux, and LibrettOS. He teaches courses such as ECE/CS 5510 (Multiprocessor Programming), ECE/CS 5544 (Compiler Optimizations), and ECE 5984/SS (Modern Binary Exploitation). His service roles include editorial board positions at IEEE Transactions on Cloud Computing and ACM Transactions on Embedded Computing Systems, and he co-chaired ACM Systor 2025. Ravindran has published over 330 papers, earning nine best paper awards, and has mentored 26 PhD students, 23 postdocs, and 11 research faculty. Notable honors include ACM Distinguished Scientist and an Office of Naval Research Faculty Fellowship. His research group explores projects like LLRM (binary security verification), Popcorn Linux (heterogeneous ISA systems), and KairosVM (real-time hypervisor). Recent advancements include Stramash OS (ASPLOS'25) and Hexo (DOD infrastructure offloading).

• Computer Architecture
• Security
• RISC-V
• +3 more

Peter Rugg is a Researcher at the Department of Computer Science and Technology, University of Cambridge. His primary focus is on applying the CHERI security architecture to the RISC-V instruction set, advancing hardware-software co-design for secure computing. He holds a PhD thesis available via Apollo and technical reports. Teaching contributions include supervising Part II projects such as 'Parallelising Sequence Alignment' (2019-20) and 'Dynamic Binary Translator from Arm to RISC-V' (2020-21). He has also taught courses on Digital Electronics, Discrete Mathematics, Computer Architecture fundamentals, Cybersecurity principles, Cryptography, Hoare Logic, and Model Checking. Affiliated with the William Gates Building at the University's main campus, Rugg's work bridges academic research and practical implementation in secure processor architectures.

Christopher BattenView profile

Professor

• Computer Architecture
• Electronic Design Automation (EDA)
• VLSI Design
• +7 more

Christopher Batten is a Professor of Electrical and Computer Engineering at Cornell University, affiliated with the Computer Science department. He leads the Batten Research Group within the Computer Systems Laboratory (CSL), focusing on computer architecture, electronic design automation, and VLSI systems. His work spans programmable accelerators, interconnection networks, and agile chip design methodologies. Batten holds a PhD from MIT, an M.Phil. from the University of Cambridge, and a B.S. from the University of Virginia. He has held visiting roles at UC Berkeley and NVIDIA. Research Interests: Computer Architecture: Accelerators, interconnection networks, and emerging technologies VLSI Design: Agile methodologies, chip prototyping, and physical design Hardware-Software Co-Design: Parallel programming frameworks and productivity tools Recent Work: Focuses on optical interconnects, 3D integration, and AI-driven hardware design. Led projects like Cornell Custom Silicon Systems (C2S2), which taped out multiple chips in SkyWater 130nm. Collaborates with industry partners like NVIDIA and Meta. Awards: Recognized with the ACM/IEEE MICRO Hall of Fame, NSF CAREER Award, and multiple teaching accolades. His group emphasizes student-led chip projects and open-source frameworks like PyMTL3. Grants & Sponsors: Supported by NSF, DARPA, AFOSR, and industrial partners including Intel, NVIDIA, and Xilinx. Current efforts include NSF CSSI projects improving gem5 and NSF Panorama for pangenomics.

Nektarios KozyrisView profile

Professor

• Parallel and Distributed Systems
• Computer Architecture
• High-Performance Computing
• +5 more

Nektarios Kozyris is a Professor of Computer Science and former Dean of the School of Electrical and Computer Engineering at the National Technical University of Athens (NTUA). He holds a PhD and Diploma in Electrical and Computer Engineering from NTUA. His research focuses on parallel and distributed systems, computer architecture, high-performance computing, and cloud infrastructure. He has authored over 180 papers and contributed to major projects like the Okeanos public cloud and Synnefo open-source software. Kozyris has led EU initiatives such as ACTiCLOUD and EuroEXA, and advises startups like Arrikto. He is a senior member of the ACM, IEEE Computer Society, and co-founder of the Greek Free/Open Source Software Society (GFOSS). His academic roles include teaching courses on computer architecture, operating systems, and distributed systems. Awards include Best Paper Awards at IPDPS 2001 and CCGRID 2013, and Intel's recognition for research in transactional memory. He actively contributes to conferences as a PC member and co-chair, and has supervised numerous PhD students in areas like distributed systems and sparse matrix computations. Kozyris pioneered the ~okeanos cloud infrastructure and advanced storage systems like Pithos. His work on GridTorrent and XOROS demonstrates innovation in data management and peer-to-peer systems. Current research includes elastic resource provisioning, quantum machine learning, and FPGA-based acceleration. His labs at NTUA and collaborations with institutions like ICCS and IMIS drive advancements in computing systems and software engineering.

Todd AustinView profile

Professor

• Computer Architecture
• Hardware Security
• Secure System Design
• +4 more

Todd Austin is the S. Jack Hu Collegiate Professor of Electrical Engineering and Computer Science at the University of Michigan's College of Engineering. His research focuses on secure computer architecture and hardware-software co-design for security-critical systems. His primary research interests include computer architecture , hardware security , secure system design , and side-channel protection . Austin's work emphasizes practical solutions for real-world security challenges through hardware-software co-design and formal verification techniques. Recent publications (2022-2025) demonstrate a strong focus on data-oblivious execution , moving target defenses , and hardware-based security primitives . Key themes include eliminating side-channel leakage through program transformations, sequestered encryption techniques, and architectural support for vulnerability-tolerant systems. Austin maintains active research engagement through his Austin-Lab and open-source contributions, including the widely-forked bringup-bench repository for CPU and system validation. Contact: austin@umich.edu | Office: 4637 BBB, 2260 Hayward Avenue, Ann Arbor, MI 48109-2121 | Phone: 734-936-0370

Marco GuarnieriView profile

Research Professor

• Security
• Privacy
• Programming Languages
• +3 more

Marco Guarnieri is an Associate Research Professor at the IMDEA Software Institute in Spain. He holds a PhD in Computer Science from ETH Zurich (2017), an MSc in Computer Engineering from the Università degli Studi di Bergamo (2012), and a BSc in Computer Engineering from the same institution (2010). His research focuses on secure hardware-software co-design, microarchitectural side-channel attacks, and formal methods for verifying security guarantees. Education : PhD in Computer Science, ETH Zurich (2017) MSc in Computer Engineering, Università degli Studi di Bergamo (2012) BSc in Computer Engineering, Università degli Studi di Bergamo (2010) Research Interests : Security, privacy, programming languages, formal methods, and microarchitectural security. His work emphasizes practical systems for securing sensitive data storage and processing, with recent focus on leakage contracts for open-source processors and automated testing of secure speculation countermeasures. Awards : Best Paper Award at CCS 2024 for work on leakage contracts for RISC-V processors Distinguished Paper Award at CCS 2023 for Spectre attack detection Best Paper Award at S&P 2021 for hardware-software contracts for secure speculation Grants & Advising : He leads a research group at IMDEA, actively mentoring PhD students and postdocs in hardware-software security. His projects include AMuLeT (automated testing of secure speculation) and LeaVe (verifying leakage contracts). Labs/Teams : IMDEA Software Institute’s security research group, focusing on cross-layer hardware-software security solutions.

Christos-Efthymios KotselidisView profile

Associate Professor

• Computer Architecture
• Parallel and Distributed Computing
• High-Performance Computing
• +4 more

Christos-Efthymios Kotselidis is an Associate Professor in the Department of Computer Science at the University of Manchester. His work focuses on runtime systems, heterogeneous computing, and high-performance computing. He leads research in optimizing Java programs using frameworks like TornadoVM and explores GPU acceleration for cryptography (FHE). His contributions include advancements in vectorization for RISC-V architectures and memory analysis of Java benchmarks. Education: PhD in Computer Science (2011) from the University of Manchester, supervised by Prof. Steve Furber and Dr. Chris Kirkham, with a thesis on Distributed Software Transactional Memory. Research Interests: Runtime environments, parallel programming models, compiler optimization, and hardware-software co-design. His work aligns with UN SDG 9 (Industry, Innovation, and Infrastructure) through digital futures research. Notable Achievements: Recipient of the Best Paper Award (2017) Principal Investigator in the Centre for Digital Trust and Society (2021–present) Over 49 peer-reviewed publications, including books and conference contributions on topics like FHE acceleration and runtime systems Lab/Team Affiliations: Member of the Advanced Processor Technology group and collaborates on the Digital Futures research beacon at the University of Manchester.

Yunsi FeiView profile

Professor

• Hardware-oriented security
• Computer Architecture
• Embedded Systems
• +7 more

Yunsi Fei is a Professor in the Electrical and Computer Engineering Department at Northeastern University, serving concurrently as Associate Dean of Faculty Affairs. She leads the Northeastern site of the NSF IUCRC Center for Hardware and Embedded System Security and Trust (CHEST). Her research focuses on hardware-oriented security, computer architecture, embedded systems, and IoT security, with significant contributions to mitigating side-channel and fault attacks on neural networks and hardware systems. Fei holds a PhD in Electrical Engineering from Princeton University (2004), and bachelor’s and master’s degrees in Electronic Engineering from Tsinghua University. She joined Northeastern in 2011 after faculty roles at the University of Connecticut. Her research interests span secure computer architecture, energy-efficient embedded systems, and underwater sensor networks. Notable projects include RINGS (a NSF-funded IoT resilience initiative) and secure RISC-V processor design. She has received the NSF CAREER Award and multiple best paper awards at top conferences. Fei’s work integrates hardware-software co-design to address vulnerabilities in AI accelerators and cryptographic systems. She leads the Energy-Efficient and Secure Systems (ENESS) Lab and collaborates with industry and academia through CHEST. Recent grants include $1.5M for cybersecurity in additive manufacturing and $1M for spectrum-agile IoT systems. Her awards include a 2023 Distinguished Paper Award (AsiaCCS) and 2022 Best Paper (Great Lake VLSI). She mentors students like Ruyi Ding, who joined LSU as faculty in 2025. Fei also chairs sessions on hardware security and is an affiliated faculty member with Northeastern’s Institute of Information Assurance.

Hussam AmrouchView profile

Professor

• AI Hardware Acceleration
• Emerging Nanoelectronics
• Cryogenic Circuits
• +4 more

Prof. Hussam Amrouch is a Full Professor of AI Processor Design at the Technical University of Munich (TUM), leading the TUM School of Computation, Information and Technology. His research focuses on ultra-efficient embodied AI, reliable designs in emerging technologies, and cryogenic circuits for quantum computing. He holds a Dr.-Ing. from Karlsruhe Institute of Technology (2015, Summa cum Laude) and previously led the "Dependable Hardware" group at KIT and the Chair of Semiconductor Test and Reliability at University of Stuttgart. He is affiliated with Munich Quantum Valley (MQV) and Munich Institute of Robotics and Machine Intelligence (MIRMI). Research interests include ferroelectric FETs, in-memory computing, cryogenic electronics, and neuromorphic systems. Key achievements include 10× HiPEAC Paper Awards, 3× DAC/DATE best paper nominations, and pioneering work on FeFET-based AI accelerators. His work bridges nanoelectronics with AI, addressing challenges in energy efficiency, reliability, and quantum integration. Publications span cutting-edge topics like cryogenic FinFETs, hyperdimensional computing, and monolithic 3D integration. He has developed novel testing methodologies, self-aware silicon systems, and energy-efficient architectures for edge-AI. Current projects explore cryogenic circuit design, radiation-resistant FeFETs, and carbon-efficient 3D neural networks. His awards reflect contributions to high-performance and embedded architectures. Research groups under his leadership focus on device-level innovations and system-level integration of emerging technologies. He actively contributes to interdisciplinary initiatives at MQV and MIRMI, advancing quantum computing and AI hardware frontiers.

Ileana BuhanView profile

Assistant Professor

• Hardware Security
• Cryptography
• Side-Channel Attacks
• +3 more

Ileana Buhan is an Assistant Professor at Radboud University Nijmegen's Digital Security Group and a member of the CESCA Lab. Her research focuses on hardware security, particularly advancing tools for secure hardware design and mitigating side-channel vulnerabilities. She previously held roles at Riscure (2011–2020) as a security evaluation manager and product manager, and at Philips Research (2008–2010) as a senior scientist. She earned her Ph.D. in Cryptography with Noisy Data from the University of Twente in 2008, recognized with the 2008 EBF European Biometrics Research Industry Award. Her work emphasizes practical security evaluation methods, automated leakage modeling (e.g., ABBY tool), and hardware-software co-design for resistance against side-channel attacks. She actively contributes to conferences like CHES, FDTC, and CARDIS, often in program committee roles. Recent invited talks include topics such as AI-driven vulnerability prediction, architecture-level simulators for root cause analysis, and automated tools for cryptographic implementation security. Her research spans RISC-V processors, microarchitecture analysis, and the intersection of machine learning with hardware security. Notable contributions include frameworks for leakage detection, fault simulation, and explainable side-channel analysis. She balances academic rigor with industry relevance, aiming to bridge gaps between theoretical security and real-world implementation challenges.

• High-Performance Computing
• Distributed Systems
• Parallel Computing
• +12 more

Juan Jose Costa Prats is a researcher in the Department of Computer Architecture at the Universitat Politècnica de Catalunya (UPC), affiliated with the Escola Tècnica Superior d'Enginyeria de Telecomunicació de Barcelona. He is a key member of the CRAAX - Centre de Recerca d'Arquitectures Avançades de Xarxes, contributing to advanced research in computing systems and network architectures. His work is deeply integrated into competitive R&D projects, including Horizon Europe and national initiatives focused on digital innovation and infrastructure. Research Interests: Costa Prats specializes in high-performance and distributed computing, with a strong focus on parallel programming models (especially OpenMP), software distributed shared memory (SDSM), cloud computing, virtualization, and cybersecurity. His recent work emphasizes secure and resilient computing systems, particularly through RISC-V-based architectures, hypervisor extensions, and runtime malware detection using opcode analysis and machine learning. He also contributes to educational innovation through remote datacenter laboratories. Publication Trends: His recent publications (2021–2024) reflect a shift toward secure, trustworthy computing environments, especially in cloud and IoT contexts. Themes include RISC-V virtualization, intrusion detection using transfer learning, GPS spoofing detection, and secure development frameworks like Vitamin-V. These works highlight a convergence of system architecture, security, and machine learning. Scientific Awards: No specific awards mentioned in the provided text. Advising and Grants: While no formal students are listed, Costa Prats collaborates extensively with leading researchers such as Beatriz Otero, Ramon Canal, and Javier Verdú. He participates in numerous competitive R&D+i projects funded by the Spanish government and the European Union, including Horizon Europe, RIS3CAT, and national research programs, focusing on cloud resilience, intelligent cloud management, and RISC-V ecosystem development. Labs and Teams: He is an active member of the CRAAX research group at UPC, which works on advanced computing architectures. His research often involves collaboration with the Barcelona Supercomputing Center. His projects, such as Vitamin-V and Remote DasaLAB, indicate involvement in both secure computing environments and innovative educational platforms.

Ramon Canal CorretgerView profile

Professor

• Microarchitecture
• Processor Design
• Memory Design
• +15 more

Ramon Canal Corretger is a Full Professor in the Department of Computer Architecture at the Faculty of Informatics of Barcelona (FIB), Universitat Politècnica de Catalunya (UPC). He previously served as Vice Dean of Postgraduate Studies at FIB and leads the VirtuOS (Virtualization and Operating Systems) research group. His work bridges computer architecture, hardware security, and system-level reliability. Doctorate from UPC, co-supervised at the University of Wisconsin-Madison Sabbaticals at Harvard University (2006–2007) and the University of Cyprus (2019–2020) Active leadership in EU-funded projects such as Vitamin-V (Horizon Europe) His research focuses on microarchitecture, processor and memory design, reliability under variability, and security at the hardware-software interface. He explores low-power multicore architectures, virtualization optimizations, and secure RISC-V-based systems. His recent work integrates AI for intrusion detection and privacy-preserving federated learning in fog computing environments. The most recent publications demonstrate a strong trend toward security, reliability, and trustworthy computing , particularly in RISC-V ecosystems and cloud/edge infrastructures. There is increasing emphasis on hardware-software co-design , attack detection via performance monitoring , and energy-efficient secure accelerators using emerging technologies like neuromorphic and photonic computing. Scientific Awards: HiPEAC Paper Awards (2017, 2010) IEEE Senior Member (2016) Fulbright Award (2006) IBM Faculty Award (2000) Best Student Paper at HPCA-6 (2000) Multiple teaching excellence recognitions from UPC and AQU Catalunya First Prize in Epson Foundation Rosina Ribalta Award (2001) He has advised several PhD students including Manish Rana, Zoran Jaksic, and Shrikanth Ganapathy, many of whom received honors such as the Intel Doctoral Student Programme recognition. His research is supported by competitive grants from the Spanish government, EU Horizon programs, and industry collaborations. He is actively involved in the design of secure, reliable, and efficient computing systems for future cloud and embedded applications. He leads the VirtuOS research group, which focuses on virtualization, operating systems, and hardware-software interface optimization. The group contributes to open-source RISC-V initiatives and participates in large-scale European R&D projects targeting trustworthy computing infrastructures.