Jaroslav KlapalekView profile
Researcher
Jaroslav Klapalek is a PreDoc Researcher in the Cyber-Physical Systems department at Vienna University of Technology (TU Wien). His work focuses on formal verification of distributed timed-automata, resilient control mechanisms, and timing anomalies in automotive architectures. He is affiliated with the Embedded Systems Group (E191-01) and has contributed to research on machine learning for industrial predictive maintenance, consensus algorithms, and energy-efficient scheduling. Research Trends: Recent publications highlight expertise in formal verification of real-time constraints, security analysis in industrial CPS, and timing predictability under clock drift and network delays. Key methods include model checking, hybrid system modeling, and safety-critical protocol validation. Scientific Awards:








