Find Academic Supervisors

Chengmo YangView profile

Professor

• Embedded Systems
• Design Automation
• Computer Architecture
• +6 more

Dr. Chengmo Yang is a Professor in the Department of Electrical and Computer Engineering at the University of Delaware, with a joint appointment. She received her PhD and MSc in Computer Science from the University of California, San Diego, and a BSc in Microelectronics from Peking University, China. PhD, University of California, San Diego MSc, University of California, San Diego BSc, Peking University, China Her research focuses on enhancing security, reliability, non-volatility, and energy efficiency in embedded systems, cyber-physical systems (CPS), and Internet-of-Things (IoT). She leads the Computer Architecture, Reliability, and Security (CARES) group and has authored over 70 peer-reviewed publications. Recent publications emphasize neural network accelerators, non-volatile memory (NVM) optimization, and security frameworks for embedded systems. Her work explores fault tolerance, wear leveling, and side-channel attack mitigation in NVM-based FPGAs, STT-RAM, and SSDs. National Science Foundation Career Award (2013) University of Delaware Mid-Career Faculty Excellence in Scholarship Award (2020) Best paper award at ICESS (2019) Three best paper nominations at DAC, DATE, and GLSVLSI (2019) Dr. Yang serves as Associate Editor for IEEE TCAD and ACM TODAES. She is the Diversity & Inclusion Representative for IEEE CEDA and has organized numerous conferences including Technical Program Chair for CODES-ISSS 2022. Her lab has hosted current and former students like Fanruo Meng (PhD candidate), Fateme Hosseini (Qualcomm), and Patrick Cronin (Intel), focusing on graduate-level research in hardware security and reliability.

Emmett WitchelView profile

Professor

• Computer Architecture
• Systems and Networking
• Security and Privacy
• +2 more

Emmett Witchel is a Professor of Computer Science at the University of Texas at Austin , with research spanning computer architecture, systems, networking, security, and privacy . His work focuses on low-level systems optimization and secure concurrent execution. Research Interests: Concurrent systems, secure execution environments, GPU integration, distributed systems. Teaching: CS 380L (Advanced Operating Systems), CS 371M (Mobile Computing). Scientific Awards: Runner-up Best Paper, ASPLOS 2013 Runner-up Award for Outstanding Research, USENIX Symposium 2012 IEEE Micro Top Pick Award 2007 ACM Honorable Mention 2004 George M. Sprowls Award, MIT EECS 2004 Recent Publications demonstrate leadership in CXL pod databases ( Tigon ), stateful serverless computing ( Boki ), SmartNIC-accelerated file systems ( LineFS ), and GPU security ( Telekine ). His work bridges hardware-software co-design and practical systems implementation.

Steven SwansonView profile

Professor

• Non-Volatile Memory
• Persistent Memory Systems
• Storage Systems
• +12 more

Steven Swanson is a Professor in the Department of Computer Science and Engineering at the University of California, San Diego, within the Jacobs School of Engineering. He is the Director of the Non-Volatile Systems Laboratory (NVSL), where he leads cutting-edge research in non-volatile memory, storage systems, and hardware-software co-design. His work bridges computer architecture, systems, and software to develop efficient, reliable, and secure computing platforms. Ph.D., University of Washington, 2006 B.S., University of Puget Sound, 1999 Dr. Swanson's research centers on non-volatile and persistent memory systems , exploring how next-generation storage technologies can transform computing. His lab develops full-stack solutions including file systems like NOVA and Orion , programming models such as NV-Heaps , and hardware prototypes like Moneta and Onyx . The team also works on low-power co-processors (e.g., GreenDroid ) and tools for debugging and verifying persistent memory programs. Research spans system reliability, security, energy efficiency, and performance optimization. His recent publications reveal a strong focus on persistent memory safety , zero-copy I/O , RDMA-based distributed file systems , and real-world characterization of Intel Optane . These works appear in top venues including ASPLOS, FAST, MICRO, and USENIX ATC, demonstrating sustained innovation in storage and systems research. Scientific honors include: NSF CAREER Award Google Faculty Award Facebook Faculty Award NetApp Faculty Fellow Dr. Swanson has advised 15 PhD students and 4 postdocs , many now faculty or senior engineers at Google, Microsoft, Intel, and other leading tech firms. He has secured significant research funding and leads major community initiatives such as the annual Non-Volatile Memories Workshop and Persistent Programming In Real Life (PIRL) . His educational efforts include innovative courses on robotic system design, quadcopter building, and modern storage systems, emphasizing hands-on learning and real-world implementation. The Non-Volatile Systems Laboratory (NVSL) under his leadership fosters a collaborative, international research environment, hosting visitors and postdocs from around the world. The lab is recognized globally as a pioneer in storage systems research and a key contributor to the adoption of persistent memory technologies in industry.

Giuliana Di MartinoView profile

Associate Professor

• Nanoscale Device Engineering
• Plasmonics
• Light-Matter Interactions
• +5 more

Giuliana Di Martino is an Associate Professor in Device Materials at the Department of Materials Science & Metallurgy, University of Cambridge. She leads the Di Martino Lab, which focuses on sustainable power solutions for non-volatile memory (NVM) and brain-like computing systems. Education : Bachelor and Master degrees from Università di Catania and Scuola Superiore di Eccellenza di Catania; PhD in Nanoplasmonics for Materials Innovation at Imperial College London (2014). Her research bridges plasmon-enhanced light-matter interactions and optically-accessible memristive devices , leveraging ultra-concentrated light in plasmonic nanocavities to study atomic-scale dynamics in memory nano-devices. Recent work includes self-assembly of nanomaterials , surface-enhanced Raman spectroscopy (SERS) , and low-power electronics for sustainable IT. Scientific Awards : Winton Advanced Research Fellowship (2018) Her grants include funding from EPSRC , Leverhulme Trust , Isaac Newton Trust , Royal Society , and ERC Starting Grant . The Di Martino Lab collaborates within the Device Materials Group (DMG), which includes three Principal Investigators.

Peter AlvaroView profile

Assistant Professor

• Distributed Systems
• Databases
• Programming Languages
• +7 more

Peter Alvaro is an Assistant Professor in the Department of Computer Science and Engineering at the Baskin School of Engineering, University of California, Santa Cruz. He joined the faculty in 2015 after earning his PhD from UC Berkeley under Professor Joe Hellerstein. His research lies at the intersection of databases, distributed systems, and programming languages , with a strong emphasis on data-centric approaches to building robust, scalable, and predictable distributed systems. He is the creator of the Dedalus language and co-creator of the Bloom language, both designed to simplify reasoning about distributed computation. Peter's recent work focuses on non-volatile memory (NVM) , computational storage , and data-centric operating systems , as seen in the Twizzler OS project. His publications span top venues such as USENIX ATC, HotNets, and Communications of the ACM, showing trends toward system resilience, efficient data management, and novel abstractions for modern hardware. Best Presentation award at USENIX ATC 2020 Peter advises graduate students, including Daniel Bittman, and is a key contributor to the Storage Systems Research Center (SSRC), now succeeded by the Center for Research in Storage Systems (CRSS). His work is supported by ongoing collaborations with researchers at UC Santa Cruz and beyond, particularly in the areas of storage, operating systems, and distributed computing.

• Virtualization
• Operating Systems
• Concurrency
• +4 more

Gaël Thomas is a Senior Researcher at Inria Saclay and a part-time Professor at École Polytechnique. He leads the Benagil team, a joint initiative between Inria and Telecom SudParis/IP Paris. His research focuses on virtualization, operating systems, concurrency, and runtime systems, with an emphasis on improving system performance and safety. He holds a PhD and Habilitation from Sorbonne Université and has extensive academic experience, including roles as a Professor at Telecom SudParis (2014–2023) and an Associate Professor at UPMC (2006–2014). Education: PhD in Computer Science, 2005, UPMC Sorbonne Université Habilitation à Diriger les Recherches (HDR), 2012, UPMC Sorbonne Université MSc in Computer Science, 2001, MIAIF Program Research Interests: Gaël’s work spans virtualization techniques, NUMA architecture optimization, garbage collection scalability, lock-free algorithms, and persistent memory systems. He has pioneered solutions like J-NVM for Java NVMM and NumaGiC for big data systems. Grants & Awards: Principal Investigator of DiVA (PEPR Cloud, 868k€) and Maplurinum (ANR PRC, 184k€) Contributions to VMKit and infra-web-cours development Labs/Teams: Benagil Team (Inria/Telecom SudParis) focuses on systems and runtime optimization.

Yihan SunView profile

Assistant Professor

• Parallel Computing
• Algorithms
• Data Structures
• +12 more

Yihan Sun is an Assistant Professor at the University of California, Riverside (UCR) since January 2020. He earned his Ph.D. in Computer Science from Carnegie Mellon University (CMU) , advised by Guy Blelloch , and holds a Bachelor's degree in Computer Science from Tsinghua University . Research Interests: Yihan Sun focuses on the theory and practice of parallel computing , including Parallel algorithms and data structures Write-efficient algorithms for Non-Volatile Memory (NVM) Computational geometry (range trees, Delaunay triangulations) Graph algorithms (SSSP, SCC, cluster-based BFS) Concurrent and persistent data structures Multi-version concurrency control (MVCC) with garbage collection Applications in databases, transactional systems, and computational biology Recent Research Trends: His work on join-based parallel balanced trees has been foundational, supporting four balancing schemes (AVL, red-black, weight-balanced, treaps) and enabling efficient implementations in graph analytics, spatial queries, and dynamic programming. Recent publications focus on output-sensitive algorithms , scalable graph libraries (PASGAL) , and pedagogical approaches to teaching parallel algorithms. Teaching: He teaches CS260 (Parallel Algorithms) at UCR and has served as a guest lecturer for MIT 6.886 (Algorithm Engineering) and CMU 15-859 (Algorithms in the real world) . He also contributed to algorithm education through a tutorial at the ACM Symposium on Principles and Practice of Parallel Programming (PPoPP 2019) . Labs & Collaborations: Yihan is a core contributor to the PAM (Parallel Augmented Maps) library, which has been integrated into systems like Aspen (graph-streaming) and C-trees . He collaborates with teams at CMU-Parlay , PBBS , and Ligra , with his code available on Github for community feedback.

Sandy IraniView profile

Professor

• Quantum Computing
• Algorithm Design
• Computational Complexity Theory
• +5 more

Sandy Irani is a Full Professor at the University of California, Irvine (UCI) in the Department of Computer Science within the Donald Bren School of Information and Computer Sciences. She received her Ph.D. from UC Berkeley in 1991 and has been at UCI since 1992. Her research focuses on algorithm design, computational complexity theory, and quantum computing, with notable contributions to online algorithms and quantum complexity theory. She currently serves as Associate Director of the Simons Institute for the Theory of Computing at UC Berkeley, a role she has held since 2022. This position allows her to collaborate with researchers across theoretical computer science and related disciplines. Irani’s teaching excellence is recognized through the UCI Distinguished Faculty Award for Teaching (2021), and she has contributed to education through her zyBook on Discrete Mathematics, used by over 94,000 students globally. Her work bridges foundational computer science with practical applications, including power management strategies and distributed computing algorithms. Notably, she has collaborated with industry leaders like Mike Luby on optimizing distributed systems. Her research in quantum computing explores computational problems inspired by condensed matter physics, aiming to understand quantum advantage over classical systems. She has also authored influential papers on topics like cache hierarchy design, scheduling algorithms, and the theoretical limits of electronic structure calculations. Awards: ACM Fellow (2022), UCI Distinguished Faculty Award for Teaching (2021). Key Roles: Associate Director, Simons Institute; Vice Chair, Computing Division at UCI. Recent Projects: Quantum algorithms for condensed matter systems, maximal independent set algorithms in distributed networks.

• Security Engineering
• Hardware Security
• Post-Quantum Cryptography
• +4 more

Prof. Tim Güneysu is a full Professor and Head of the Security Engineering department at the Faculty of Computer Science, Ruhr-Universität Bochum. He serves as Vice Dean for Strategy and Finances (since 2023) and previously as Speaker of the Horst-Görtz Institute for IT-Security (2020-2023). His academic journey includes roles as Associate Professor at the University of Bremen (2015-2017) and Assistant Professor at Ruhr-Universität Bochum (2011-2015). He also holds positions at the German Research Center for Artificial Intelligence (DFKI) and has conducted postdoctoral research at UMass Amherst. His research focuses on Security-by-Design principles, CAD for Security, and countermeasures against physical attacks. He emphasizes efficient cryptographic implementations and system-level hardware security. Key areas include post-quantum cryptography, side-channel resistant designs, and secure embedded systems. He has contributed over 200 publications in top venues, with recent work on FPGA-based cryptographic accelerators, secure hardware extensions (e.g., KeyVisor), and post-quantum algorithms for IoT. His research themes include agile signature acceleration, fault attack mitigation, and hardware-software co-design for security. Notable projects include CONVOLVE (edge-AI security) and QuantumRISC (quantum-safe systems). His work bridges theoretical cryptography with practical hardware implementations, emphasizing real-world security applications.

Alexandra FedorovaView profile

Professor

• Systems Software
• Memory and Storage Management
• Accelerator-Centric Computing
• +4 more

Dr. Alexandra Fedorova is a Professor in the Department of Electrical and Computer Engineering at the University of British Columbia (UBC), with an Associate Member role in the Computer Science department. She leads the Systopia systems research group, focusing on system software design, memory/storage management, and accelerator-centric computing. Her work emphasizes performance optimization, energy efficiency, and hardware-software co-design. She holds a PhD from Harvard University (2006), where she researched operating system scheduling under Margo Seltzer. Prior to UBC, she was an Associate Professor at Simon Fraser University (2006–2015). Fedorova is a recipient of the Alfred P. Sloan Research Fellowship and the Anita Borg Early Career Award. She consults for MongoDB's storage engine team and collaborates with industry on storage and performance challenges. Her research spans tools like Non-sequitur for program trace visualization, studies on storage-class memory (e.g., Optane), and frameworks for GPU acceleration. Recent efforts include Sunstone (spatial accelerator scheduling) and ExtMem (application-aware memory management). Her work bridges low-level systems with high-performance computing needs. Key contributions include optimizing NUMA systems, improving storage engine performance, and exploring processing-in-memory architectures. Fedorova’s projects often involve open-source collaboration, reflected in her GitHub repositories such as vividperf and perf-logging , which support performance analysis tools.

Greg GangerView profile

Professor

• Cloud Computing
• Storage Systems
• Operating Systems
• +3 more

Greg Ganger is the Jatras Professor of Electrical and Computer Engineering at Carnegie Mellon University and Director of the Parallel Data Lab (PDL). His research focuses on computer systems, including cloud computing, storage systems, distributed systems, and machine learning infrastructure. He holds a Ph.D. in Computer Science and Engineering from the University of Michigan and completed postdoctoral work at MIT. Education: Ph.D., M.S., and B.S. in Computer Science from the University of Michigan (1991–1995). Research Interests: Ganger leads projects in cloud computing, storage/file systems, operating systems, and systems for big data and large-scale machine learning. Recent work includes optimizing cloud resource scheduling, developing sustainable storage solutions, and improving ML cluster efficiency. The PDL explores storage system architecture, file systems, and leveraging new storage technologies like non-volatile memory (NVM). Awards: 2021 OSDI Best Paper, 2021 SOSP Best Paper, 2021 SoCC Test of Time Award, and 2021 R&D 100 Award. His team's work on Kangaroo caching and MACARON cloud caching exemplifies cutting-edge contributions. Advising & Grants: Advises graduate students in ECE and Computer Science. Active in grants related to distributed storage, cloud systems, and ML infrastructure. Collaborates with industry partners like Los Alamos National Lab on storage systems. Labs/Teams: Directs the Parallel Data Lab (PDL), a leading research group in storage and distributed systems. Collaborates with CMU’s CyLab on security aspects of storage systems and ML infrastructure.

James TuckView profile

Professor

• Computer Architecture
• Compiler Design
• Chip Multiprocessors
• +3 more

James Tuck is a Professor and Senior Associate Department Head for Undergraduate Affairs in the Department of Electrical and Computer Engineering at NC State University. He holds a BE from Vanderbilt University, and MS and PhD from the University of Illinois at Urbana-Champaign. His research focuses on computer architecture, compiler design, and DNA-based data storage, with notable contributions to chip multiprocessors and speculative execution. He has been recognized with two IEEE Micro Top Picks Paper Awards and the William F. Lane Outstanding Teaching Award. Education: Ph.D. in Computer Science, University of Illinois at Urbana-Champaign (2007) MS in Electrical and Computer Engineering, University of Illinois at Urbana-Champaign (2003) BE in Computer Engineering, Vanderbilt University (1999) Research Interests: Computer Architecture and Systems Compiler Design for Multiprocessors Hardware Support for Speculative Execution Advances in DNA Data Storage Non-Volatile Memory Systems Recent work emphasizes DNA storage scalability and security, including frameworks like FrameD and innovations in nanopore decoding. His articles span hardware optimization, persistent memory security, and biochemical storage solutions. Awards highlight both technical and pedagogical excellence. Advising and Grants: Leadership in Undergraduate Engineering Affairs NSF grants for DNA storage and memory systems Labs/Teams: Member of Undergraduate Affairs Team in NC State ECE Collaborations with Chemical and Biomolecular Engineering

Pankaj MehraView profile

Adjunct Professor

• Computer Architecture
• Memory Systems
• Storage Systems
• +13 more

Pankaj Mehra is an Adjunct Professor in the Department of Computer Science and Engineering at the Jack Baskin School of Engineering, University of California, Santa Cruz (UCSC). He is affiliated with the Storage Systems Research Center (SSRC), now succeeded by the Center for Research in Storage Systems (CRSS). Alongside his academic role, he is the Founder and CEO of Elephance Memory, Inc., and serves as Workstream Lead for Computational x Programming (x = Memory or Storage) at the OpenCompute Project. Ph.D. in Computer Science, University of Illinois at Urbana-Champaign Former Faculty, IIT Delhi Adjunct Faculty, University of California, Wright State University Computer Scientist, NASA Ames Research Center Founder, HP Labs Russia Executive Roles: SVP & WW CTO at Fusion-io; VP at Samsung, SanDisk, Western Digital Pankaj Mehra's research centers on next-generation memory and storage systems. His work explores disaggregated memory architectures, computational storage, non-volatile memory (NVM), and data-centric operating systems. He investigates how to optimize data placement, improve system performance through intelligent caching, and restructure computing models around emerging memory technologies like CXL and persistent memory. His recent publications focus on far memory, tiered memory systems, and offloading computation to storage devices. His recent publications demonstrate a strong focus on memory disaggregation, computational storage, and non-volatile memory systems. Themes include rethinking data and pointer management in distributed memory environments, resource allocation in tiered systems, and designing operating systems that treat data as a first-class citizen. His work bridges academic research and industrial innovation, often involving collaboration with leading researchers at UCSC. Samsung R&D Award (2019) CES R&D Innovation Award (2021) Terabyte Sort Trophy by Jim Gray (1998) TPC-C Cluster Performance Records (1997) Pankaj Mehra has advised and collaborated with numerous researchers and engineers across academia and industry. His work has been supported by affiliations with HP Labs, Fusion-io, Samsung, and now Elephance Memory, Inc. He has led major research and development initiatives, including SmartSSD at Samsung and foundational work on persistent memory at HP. He has also contributed to standards efforts through the InfiniBand Trade Association. He has been a key contributor to the UCSC Storage Systems Research Center (SSRC/CRSS), collaborating with faculty and researchers including Ethan L. Miller, Heiner Litz, and Daniel Bittman. His industry leadership at Elephance Memory, Inc. and involvement in the OpenCompute Project further extend his influence in shaping future data infrastructure technologies.

Sang-Woo JunView profile

Professor

• Big Data Analytics
• Hardware Acceleration
• Non-Volatile Memory
• +3 more

Professor Sang-Woo Jun is a leading researcher in systems and software for big data analytics, focusing on FPGA-based hardware acceleration and non-volatile memory (NVM) storage. His work spans applications such as graph analytics and bioinformatics, with a strong emphasis on cost-effective, high-performance computing architectures. He advises PhD students like Shengquan Ni and Yicong Huang, both of whom have achieved notable milestones (e.g., thesis defense, fellowship awards). Research Interests: Hardware Acceleration for Big Data FPGA-Based System Architectures Non-Volatile Memory Systems Graph Analytics and Bioinformatics Edge Computing and Low-Power Systems Recent Contributions: His articles highlight innovations in edge accelerators (e.g., IceSpy, Eciton), genomics acceleration (Bancroft), and scalable graph processing (Durin, Sting). These works emphasize reconfigurable systems, privacy-preserving techniques, and energy-efficient designs. Lab & Team: As part of the Intelligent Systems Group (ISG), he collaborates on events like the Southern California Database Day. His research bridges hardware-software co-design with real-world applications in IoT, environmental monitoring, and genomics.

Yuanchao XuView profile

Assistant Professor

• Computer Architecture
• Security
• Machine Learning Systems
• +3 more

Yuanchao Xu is an Assistant Professor in the Department of Computer Science and Engineering at the University of California Santa Cruz. He earned his Ph.D. from North Carolina State University, advised by Dr. Xipeng Shen and Dr. Yan Solihin, and is a student researcher at SystemResearch@Google since 2021. His research spans computer architecture, security, and ML systems.