Jim Torresen is a Professor at the Norwegian University of Science and Technology (NTNU), specializing in Computer Science, Artificial Intelligence, and Robotics. He earned his M.Sc. and Dr.ing. (Ph.D.) in computer architecture and design from NTNU in 1991 and 1996 respectively, followed by industry experience in hardware design before transitioning to academia in 1999. Research Interests: His work spans Machine Learning, Evolvable Hardware, and Ethical AI, with notable contributions to music technology, facial expression recognition, and healthcare monitoring systems. He actively explores interdisciplinary applications of AI in creative domains and clinical environments. Publications & Editorial Roles: Torresen has published extensively in journals like Frontiers in Artificial Intelligence and Genetic Programming and Evolvable Machines . He serves as a Topic Editor for Frontiers in Explainable AI and has editorial roles in robotics and biomedical AI domains.
Tom Conte is an academic leader with a joint appointment in the School of Electrical & Computer Engineering and School of Computer Science at Georgia Institute of Technology. As the founding director of the Center for Research into Novel Computing Hierarchies (CRNCH), he specializes in computer architecture and compiler optimization. His work focuses on manycore architectures, energy-efficient microprocessor design, and embedded system architectures. Prior to Georgia Tech, he directed the Center for Embedded Systems Research at North Carolina State University. He holds IEEE Fellow status and served as 2015 President of the IEEE Computer Society, co-leading the IEEE Rebooting Computing Initiative since 2011. Dr. Conte earned his bachelor’s degree in Electrical Engineering from the University of Delaware (1986), followed by M.S. and Ph.D. degrees in Electrical Engineering from the University of Illinois at Urbana-Champaign (1988 and 1992). His research has been recognized with prestigious awards including the IEEE Computer Society’s Golden Core Member award and the National Science Foundation’s CAREER Award (1996). His research interests span quantum computing, 3D chip architectures, energy-efficient processing, and post-Moore computing innovations. He has pioneered initiatives like the Superstrider architecture and CREEPY energy-efficient processing frameworks. Recent work includes advancements in quantum programming languages (e.g., Qwerty) and hybrid quantum-classical systems. Awards: IEEE Fellow, Young Alumni Achievement Award, CAREER Award Leadership: IEEE Computer Society President (2015), CRNCH Director Key Projects: Rebooting Computing Initiative, Superstrider Architecture His lab’s contributions include novel compiler optimizations for manycore systems, smart NIC offloading techniques, and thermodynamically inspired computing models. Conte’s work bridges academic research with industry needs through interdisciplinary collaborations and standardization efforts.
Roger Chamberlain is a Professor in the Department of Computer Science & Engineering at Washington University in St. Louis , affiliated with the McKelvey School of Engineering . He has been on faculty since 1989, specializing in digital systems, parallel processing, computer architecture, embedded systems, and reconfigurable logic. Education: DSc, Washington University in St. Louis, 1989 MS, Washington University in St. Louis, 1985 BS, Washington University in St. Louis, 1983 Research Interests: His work focuses on architecturally diverse computing systems, including specialized architectures for astrophysics and biology. He explores high-performance parallel/distributed applications, energy-efficient computation, and high-capacity I/O systems. He collaborates with industry partners like Exegy, Inc., VelociData, Inc., and BECS Technology, contributing to commercialization of university-developed technologies for data analysis and microprocessor-based controls. Grants & Awards: In 2021, he was a co-investigator on a $5M gamma ray astronomy mission grant. In 2018, he led an NSF-funded project ($1.2M) to enhance streaming application efficiency on diverse architectures. His consulting and industry ties reflect a commitment to bridging academic research with practical applications. Professional Contributions: He co-founded Exegy, VelociData, and BECS Technology. His lab website and Google Scholar profile provide additional insights into his work.
Russell Tessier is a Professor and Department Head of Electrical and Computer Engineering at the University of Massachusetts Amherst, affiliated with the Manning College of Information and Computer Sciences. His research focuses on reconfigurable computing, FPGA architectures, and hardware security, with notable contributions in CAD algorithms for FPGAs, embedded systems, and multi-tenant FPGA vulnerability analysis. Education: B.S.C.S.E., Rensselaer Polytechnic Institute (1989) M.S. and Ph.D., Massachusetts Institute of Technology (1992 and 1999) Research Interests: Dr. Tessier's work spans FPGA security (e.g., side-channel attacks, power distribution vulnerabilities), reconfigurable cloud computing, and hardware acceleration for applications like SAR imaging and machine learning. His lab, the Reconfigurable Computing Group, develops open-source FPGA cores (e.g., FlexGrip GPGPU, DE4 NetFPGA) and explores cutting-edge security countermeasures. Awards and Honors: Chancellor's Leadership Fellow (2015-2016) NSF Information Technology Research Grant Lilly Teaching Fellow (2002-2003) Multiple College of Engineering Excellence Awards Grants and Projects: Active funding includes NSF SaTC grants on reconfigurable cloud security and NASA support for snowpack measurement systems. His research also addresses FPGA-based solutions for cybersecurity, such as intrusion detection and power-side channel mitigation. Labs and Teams: Leads the UMass Reconfigurable Computing Group, which collaborates on open-source FPGA tools, security frameworks, and embedded system designs. The group maintains platforms like the DE4 NetFPGA and FlexGrip architecture.
Sanjeev Baskiyar is a Professor in the Department of Computer Science and Software Engineering at Auburn University's College of Engineering. He has been actively involved in research, teaching, and academic leadership, with a strong focus on computer systems, real-time and embedded computing, scheduling, cloud and fog computing, and energy-aware architectures. Education: Ph.D., Electrical and Computer Engineering, University of Minnesota M.S., Electrical and Computer Engineering, University of Minnesota B.S., Electronics and Communications, Indian Institute of Science, Bangalore B.S., Physics (with honors), and distinction in Mathematics Dr. Baskiyar’s research interests span scheduling, real-time and embedded systems, computer architecture, fog/cloud computing, thermal/energy-aware computing, and STEM education. His recent work explores machine learning applications in scheduling and quantum computing for fake news detection. He has supervised over 25 graduate students, many of whom now hold academic and industry positions. His recent publications emphasize fog computing simulation, service placement, quantum-inspired fake news detection, and adaptive scheduling using machine learning. These works reflect a trend towards intelligent, scalable, and energy-efficient computing systems, particularly in distributed and edge environments. Scientific Awards and Honors: Walker Teaching Excellence Award, Auburn University, 2020 Summer Faculty Fellow, Air Force Research Labs, 2020 Nominated Best Teaching Assistant, University of Minnesota, 1992 Multiples Merit and State-merit Scholarships Honors in Physics and Distinction in Mathematics Dr. Baskiyar has successfully advised numerous MS and PhD students and secured over $2 million in research funding as Principal Investigator from the National Science Foundation, DARPA, NASA, and industry partners like Wind River Systems and Mentor Graphics. His grants focus on parallel computing education, real-time micro-architectures, and embedded systems. He has also served on editorial boards, program committees, and as a reviewer for NSF and IEEE journals. He has held leadership roles including Senator in the University Faculty Senate and Chair of the E-day Committee. Labs and Research Groups: While not explicitly named, Dr. Baskiyar leads a research group focused on computer systems, scheduling, and embedded computing, as evidenced by his long list of graduate student supervision and funded projects in fog, cloud, and real-time systems.
Tathagata Srimani is an Assistant Professor in the Department of Electrical and Computer Engineering at Carnegie Mellon University (CMU), affiliated with the College of Engineering. He previously served as a Postdoctoral Scholar in Electrical Engineering at Stanford University. His academic journey includes a Ph.D. and S.M. in EECS from MIT (2022 and 2018 respectively) and a B.Tech. in E&ECE from IIT Kharagpur (2016). Research Focus: Srimani’s work centers on nanoelectronics and transformative NanoSystems. Key areas include: Carbon nanotube field-effect transistors (CNFETs) and their monolithic 3D integration with silicon Ultra-dense 3D integration of logic and memory to address the 'memory wall' in AI/ML Technology-architecture co-design frameworks for energy-efficient computing Key Achievements: Developed first silicon fab-compatible CNFET processes (TNANO ’18, Nature ’19) Enabled CNFET RISC-V microprocessor and monolithic 3D integration with Analog Devices/SkyWater Recipient of MIT Presidential Fellowship (2016) and Morris Joseph Levin Award (2018) Teaching & Outreach: Teaches semiconductor devices and hardware design, including hands-on 'Hacker Fab' courses. Leads the NEXUS Research Group exploring heterogeneous nanomaterials (e.g., magnetic and oxide semiconductors) and thermal/power management in 3D systems. Future Directions: Expanding into probabilistic computing hardware, co-design frameworks for application-specific systems, and scaling 3D NanoSystem technologies for industrial adoption.
Kyprianos Papadimitriou is a Researcher at the Microprocessor and Hardware Laboratory within the School of Electrical and Computer Engineering at the Technical University of Crete . He holds a PhD in Electronic and Computer Engineering (2012) and has been involved in teaching laboratory courses such as Logic Design , Computer Architecture , and VLSI/ASIC Circuit Design . Research Areas : His work spans Reconfigurable Systems , Hardware Design , Computer Architecture , RFID Systems , and Real-Time Systems . He has developed innovative approaches in FPGA-based dynamic reconfiguration, MPSoC security, and 3D stereo vision for surveillance. Key Trends : Runtime reconfiguration for FPGAs Security frameworks for NoC-based MPSoCs Low-cost embedded vision systems Optimization of reconfiguration overhead Hardware task scheduling methodologies Genetic algorithm implementations on FPGAs Scientific Contributions : 1 USA patent (2005) Co-author of VLSI-SoC 2013 paper nominated for 1st Prize Active member of scientific committees (FPL, ReConFig) Peer reviewer for IEEE, Elsevier, and Springer journals Session chair at IEEE CNS and HPCC conferences Grants & Projects : Participated in competitive European and national programs, serving as scientific manager, coordinator, and technical coordinator. Developed spin-off company (2003-2005) to commercialize master's thesis research. Laboratory & Teaching : Affiliated with the Microprocessor and Hardware Laboratory , focusing on practical training in digital systems, processor-based systems, and VLSI design.
Yiorgos Makris is a Professor in the Department of Electrical and Computer Engineering at the Erik Jonsson School of Engineering & Computer Science, The University of Texas at Dallas, since July 2011. Previously, he was a faculty member at Yale University for over a decade. He holds a Ph.D. in Computer Engineering from the University of California, San Diego, and a Diploma in Computer Engineering from the University of Patras, Greece. Education: Ph.D. in Computer Engineering, University of California, San Diego (2001) M.S. in Computer Engineering, University of California, San Diego (1997) Diploma in Computer Engineering and Informatics, University of Patras, Greece (1995) Research Interests: Hardware Security and Trustworthiness Statistical Side-Channel Fingerprinting Machine Learning in Semiconductor Manufacturing Trusted and Reliable Integrated Circuits Hardware Trojans in Wireless Cryptographic ICs On-Die Learning and Emergent Technologies His work focuses on enhancing hardware security through statistical methods, machine learning, and formal verification, with applications in analog/RF ICs, post-production calibration, and secure IC design. Key Contributions: Co-Founder and Site-PI of NSF CHEST I/UCRC (Hardware and Embedded System Security and Trust) Leader of the Safety, Security, and Healthcare Thrust at TxACE (Texas Analog Center of Excellence) Director of the Trusted and RELiable Architectures (TRELA) Lab Grants and Funding: NSF, NIH, SRC, ARO, AFRL, AFWERX, DARPA, DOE, and industry partnerships with Boeing, Northrop Grumman, IBM, Intel, Qualcomm, etc. Recent grants include projects on DNA storage security, analog neural networks, and malicious hardware detection. Awards and Recognition: IEEE Fellow (2025) Best Paper Awards at DATE'13, VTS'15, DCAS'22 Best Hardware Demonstration Awards at HOST'16 and HOST'18 Erik Jonsson School Faculty Research Award (2020) Labs and Teams: TRELA Lab (Focus: Secure Hardware Design, Trusted Architectures) CHEST I/UCRC (Industry-University Collaboration)
Hossein Valavi is a Lecturer and Assistant Director of Undergraduate Studies at Princeton University, contributing to advancements in computer architecture and hardware acceleration. His research focuses on in-memory computing, neural networks, and energy-efficient systems, with notable work in reconfigurable architectures and mixed-signal processing. He has received multiple teaching awards, including recognition for innovative pandemic-era Car Lab courses and collaborative work honored by the Edison Patent Award. His academic contributions span academic positions since 2018, emphasizing both research and pedagogical excellence. Key technical areas include scalable in-memory computing systems, analog neural network accelerators, and low-power matrix factorization algorithms. His work addresses critical challenges in data movement reduction and hardware-software co-design for modern computing systems. Awards: Teaching Excellence Awards (2021, 2023), Edison Patent Award (2023) Grants & Projects: Leading developments in in-memory computing accelerators and embedded microprocessor designs Research teams under his guidance have produced impactful IP in semiconductor layouts, CNN accelerators, and programmable architectures, aiming to bridge theoretical computer science with practical hardware implementations.
Timothy M. Jones is a Professor of Computer Architecture and Compilation at the University of Cambridge's Computer Laboratory, serving as Director of the Computer Architecture and Semiconductor Design Centre (CASCADE) and Fellow/Director of Studies at Gonville and Caius College. His research focuses on parallelism extraction in applications to enhance performance and address energy efficiency/reliability challenges in compilers, binary translators, and microarchitectures. Current work includes novel cache prefetching techniques, thread-level parallelism schemes, and advanced core prediction methods. He has an Erdős number of 4 and a Dijkstra number of 4 via collaborative networks. Research interests span computer architecture fundamentals, compiler optimizations, hardware security mechanisms, and fault tolerance strategies. Notable contributions include speculative vectorization, heterogeneous parallel error detection (MEEK/FireGuard), and security tools like MarkUs and MineSweeper. CASCADE oversees interdisciplinary projects addressing future microprocessor/system challenges. Jones supervises PhD students through CASCADE's 2025 intake program. Publications emphasize architectural innovations in memory systems, security, and energy efficiency. Key works include MASCOT (memory dependence prediction), Scalar Vector Runahead (2024), and Decoupled Vector Runahead (2023). His work integrates hardware-software co-design principles to tackle real-world processor bottlenecks.
Navid Bayati is an Associate Professor at the University of Southern Denmark, affiliated with the Institute of Mechanical and Electrical Engineering and the Centre for Industrial Electronics. He leads the Control and Protection of Smart Grids (CAP-SG) group and focuses on renewable/hybrid power systems, microgrid protection, and grid code compliance. Education: Ph.D. in Power Systems & Microgrid Protection (2020, Aalborg University); M.Sc. in Power Systems (2017, Amirkabir University of Technology) His research spans renewable energy integration , transient analysis , grid interconnection , and digital twin applications . Recent work includes machine learning for carbon emission prediction, fault localization in DC microgrids, and supercapacitor resilience in hybrid systems. Collaborations include projects like IEA Wind Task 50 and RePoSys , addressing grid renovation, life cycle assessment, and digital twin resilience. His teaching portfolio covers power electronics , energy management , and microgrid control .
Daniel Loveless is Associate Professor of Intelligent Systems Engineering and Director of the IU Center for Reliable and Trusted Electronics (CREATE) at Indiana University. He holds B.S. (Georgia Tech), M.S./Ph.D. (Vanderbilt) degrees in Electrical Engineering. Loveless's research focuses on radiation effects/reliability in electronic/photonic integrated circuits, radiation-hardened digital/mixed-signal design, embedded systems, FPGAs, microprocessors, SoCs, and CubeSats. With over 120 peer-reviewed publications, his work advances radiation-tolerant electronics for space/defense applications. Leadership and Honors: Director, IU Center for Reliable and Trusted Electronics Senior Member, IEEE Associate Editor, IEEE Transactions on Nuclear Science 2019 NPSS Radiation Effects Early Achievement Award Recipient of five best conference paper awards
Mohamed S. El-Genk is a Regents’ Professor and Distinguished Professor in the Department of Nuclear Engineering, Mechanical Engineering, and Chemical & Biological Engineering at the University of New Mexico (UNM). He also serves as Founding Director of the Institute for Space and Nuclear Power Studies (ISNPS) and is affiliated with the Configurable Space Microsystems Innovations & Applications Center (COSMIAC). Education: Ph.D. in Nuclear Engineering (UNM, 1978), M.S. in Nuclear Engineering (University of Alexandria, 1975), B.S. in Nuclear Engineering (University of Alexandria, 1968) His research spans nuclear reactor thermal-hydraulics, space nuclear power systems, energy conversion, heat pipes, boiling heat transfer, two-phase flow, radiation shielding, and molecular dynamics modeling of nuclear materials. He has pioneered thermal management solutions for terrestrial and space applications. The 15 most recent publications focus on reactor design optimization (e.g., SLIMM-1.2, VSLLIM), heat transfer correlations in microchannels and helically coiled tubes, radiation damage modeling, and thermal-hydraulics of modular and lunar reactor systems. These works reflect his expertise in nuclear materials, CFD simulations, and energy conversion technologies. Scientific Awards: 2017 ASME Heat Transfer Memorial Award, 2015 ANS Thermal-Hydraulics Technical Achievement Award, AIChE Donald Q. Kern Award (2009), ANS Fellow (1996), ASME/AIChE Max Jacob Award Committee Chair (2005-06) El-Genk has supervised over 60 graduate students (30 Masters, 32 Doctoral) and contributed to 380+ refereed papers. He leads the development of global standards for space nuclear reactors and serves on editorial boards for journals including Thermal Science and Engineering Progress and Energy Conversion and Management .
Dr. Matt Bonney is a Lecturer in Space Engineering at Swansea University, affiliated with the School of Aerospace, Civil, Electrical and Mechanical Engineering. He holds a position in the Department of Aerospace Engineering and is actively involved in postgraduate supervision. His research focuses on digital twin technology, nonlinear structural dynamics, mechanical joint modeling, seismic reliability, and uncertainty quantification, with recent emphasis on digital twin security and thermo-mechanical coupling in assembled structures. Dr. Bonney's expertise spans multi-physics joint modeling and multi-disciplinary development of digital twins, with international collaborations. He teaches modules such as 'Advanced Space Systems' (EG-M334) and 'Aerospace Systems' (EGA220), emphasizing space system design, orbital mechanics, and cyber-physical security. His research highlights include the development of a Python Flask-based digital twin operational platform, contextualization of information in digital twin processes, and experimental studies on frictional interfaces. His work on uncertainty quantification and seismic reliability has applications in nuclear reactor systems and civil engineering structures. Dr. Bonney currently supervises a PhD student focusing on nonlinearities in thermal-mechanical joints. His research outputs include over 30 peer-reviewed publications, with contributions to journals like Mechanical Systems and Signal Processing and Data-Centric Engineering .
George Vosselman is a Full Professor at the University of Twente, Faculty of Geo-Information Science and Earth Observation (ITC), specializing in Geo-Information Extraction with Sensor Systems. Educated with honours at Delft University of Technology (1986) and PhD in Photogrammetry from Rheinische Friedrich Wilhelms University of Bonn (1991), he has held academic roles at the University of Stuttgart, University of Washington, and Delft University of Technology (1993–2004). Since 2004, he has been a key figure at ITC, serving as department head (2012–2018, 2023–). Education: Delft University of Technology (BSc with honours, 1986), Rheinische Friedrich Wilhelms University of Bonn (PhD with honours, 1991) His research focuses on leveraging sensor technology advancements for large-scale geo-information production. Key expertise includes quality analysis of laser altimetry data, point cloud segmentation/classification, 3D building/road modeling, and model-driven imagery analysis. He has published over 220 papers and co-edited the textbook Airborne and Terrestrial Laser Scanning (2010). Recent work integrates deep learning with geospatial data, addressing semantic segmentation, visual question answering, and drone-based mapping. Recent publications (2025–2023) highlight trends in deep learning for remote sensing , including multimodal question answering benchmarks (HRVQA), vectorized building extraction (RoIPoly), latent diffusion for road modeling (LDPoly), and drone obstacle avoidance systems. His work bridges photogrammetry , computer vision , and robotic mapping , with applications in urban planning, disaster management, and informal settlement monitoring. Scientific Awards : Hansa Luftbild (1993), ISPRS Otto von Gruber (2000), Schwidefsky Medal (2012), Karl Kraus Medal (2012), ASPRS Fairchild Award (2015), ISPRS Fellow (2020) As an educator, Vosselman has taught photogrammetry, remote sensing, and laser scanning at Delft University of Technology and globally. He chaired the ITC Examination Board (2015–2023) and modernized geo-information education in Asia/Africa. His software for point cloud processing is commercialized in Europe, and he currently leads ISPRS working groups on point cloud methodologies. Labs/teams include the Earth Observation Science Chair Group at ITC, collaborating on UAV-based datasets (UAVid, UAVPal) and indoor laser scanning systems. Recent activities (2025) involve invited talks on pulse matching limitations in laser scanning and deep learning for point cloud classification.
