Microarchitecture Optimization Professors and Supervisors

Adam ChlipalaView profile

Professor

National and Kapodistrian University of AthensGreece

Adam Chlipala is a Professor at the Massachusetts Institute of Technology working at the intersection of programming languages, formal methods, and computer systems. His research focuses on building practical verified systems with end-to-end machine-checked proofs, particularly using the Coq proof assistant. His educational background includes a Computer Science undergraduate degree from Carnegie Mellon University (2003) and a PhD in Computer Science from the University of California, Berkeley (2007). Following a postdoctoral position at Harvard University through 2011, he joined MIT as faculty. Chlipala's research spans multiple domains with strong emphasis on dependent types , verified compilation , and hardware-software co-verification . His work consistently bridges theoretical foundations with practical implementation, as evidenced by his development of the Ur/Web programming language and his focus on creating clean-slate hardware-software stacks with formal guarantees. Key research thrusts include cryptographic constant-time verification, side-channel security, and verified tensor compilation. His recent publications (2020-2025) reveal a clear trajectory toward increasingly complex verified systems, with growing emphasis on hardware-software integration, cryptographic implementations, and performance-critical applications. The work consistently leverages Coq for machine-checked proofs while addressing real-world constraints like timing channels and hardware interfaces. Chlipala is the author of the influential textbook Certified Programming with Dependent Types , which serves as a primary educational resource for Coq at numerous institutions worldwide. His professional activities include significant service to the PL community through program committees for major conferences including PLDI, POPL, ICFP, and CPP. He leads research initiatives connecting hardware and software verification, most notably through the DeepSpec project which aims to build fully verified computing stacks. His current work focuses on practical applications of dependent types for business applications through Ur/Web and verified cryptographic implementations.

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Vincent WeaverView profile

Associate Professor

University of MaineUnited States

Vincent Weaver is an Associate Professor in the Electrical and Computer Engineering Department at the University of Maine's College of Engineering. He leads the VMW Research Group, focusing on low-level systems research including hardware performance counters, computer architecture, and operating systems. Weaver received his BS in Electrical Engineering from the University of Maryland College Park in December 2000, followed by MS (January 2009) and PhD (May 2010) degrees in Electrical and Computer Engineering from Cornell University. He joined the University of Maine faculty in July 2012 as an Assistant Professor and earned tenure and promotion to Associate Professor in September 2018. His research centers on hardware performance analysis, architectural simulation, and systems programming with emphasis on Linux kernel development and embedded systems. Weaver's work bridges theoretical computer architecture with practical systems implementation, often resulting in open-source tools that advance the field. His publications reveal a consistent focus on performance analysis techniques, code optimization, and security through low-level system understanding. Weaver maintains an active teaching schedule including courses in embedded systems, operating systems, and network engineering. He values students with strong programming skills and encourages open source contributions as part of the learning process. His research group provides hands-on experience with cutting-edge processor architectures and performance analysis tools.

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Klaus von GleissenthallView profile

Assistant Professor

University of California, San DiegoUnited States

Klaus von Gleissenthall is a tenured Assistant Professor in Computer Science at Vrije Universiteit Amsterdam, affiliated with the Theory Group and VUSec security lab. He holds a joint appointment with CWI's Computer Security group. Previously, he was a post-doc at UCSD and completed his PhD at TUM under a Microsoft Research scholarship. His research integrates programming languages , security , and systems to develop formally verified, low-overhead solutions for hardware/software correctness. Key focus areas include: Side-channel attack mitigation via leakage contracts Refinement-type systems for hardware verification Byzantine fault tolerance in distributed systems Publications demonstrate strong emphasis on hardware security (45% of recent papers), formal methods (30%), and distributed systems (25%), with consistent appearances in top-tier venues (S&P, CCS, OOPSLA). Awards & Honors: ERC Starting Grant (€1.5M, 2024) Intel Hardware Security Award Honorable Mention (2020, 2024) Distinguished Paper Awards: CCS'23, OOPSLA'23, POPL'21 He advises four PhD students and two post-docs, supported by his ERC grant. Current projects include refinement types for hardware and pre-silicon leak detection. His lab collaborates with VUSec and CWI, focusing on scalable verification tools like LLVM Blade and methodologies for constant-time execution guarantees.

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Gary TanView profile

Professor

Max Planck Institute for Security and PrivacyGermany

Gang (Gary) Tan is a Professor in the Computer Science and Engineering Department at Pennsylvania State University, co-directing the Institute for Networking and Security Research (INSR). His research bridges computer security, formal methods, and programming languages to develop practical solutions for software vulnerabilities and AI fairness. Education: B.E. in Computer Science from Tsinghua University Ph.D. in Computer Science from Princeton University Dr. Tan specializes in applying compiler techniques and formal verification to security challenges, with seminal work on cache side-channel attacks and fairness in machine learning. His Security of Software (SOS) Group develops frameworks that integrate theoretical guarantees into real-world systems, emphasizing measurable security outcomes and ethical AI. Recent projects focus on quantifying bias in neural networks and mitigating speculative execution vulnerabilities. Analysis of his 2021-2025 publications reveals a strategic pivot toward AI security, where he pioneers methods for fairness testing (e.g., information-theoretic debugging) and repair (e.g., NeuFair). Concurrently, his security work evolves from foundational side-channel research (SpecSafe, 2021) toward hardware-software co-design solutions, demonstrating consistent innovation across theoretical and applied domains. Scientific Awards: James F. Will Career Development Professorship NSF CAREER Award Google Research Award (two instances) Distinguished Reviewer Award at 2018 IEEE Symposium on Security and Privacy Outstanding Research Award at Penn State Ruth and Joel Spira Excellence in Teaching Award Best Paper Award at PLDI 2024 Dr. Tan leads the SOS Group with funding from NSF (including CAREER), DARPA (ISAT study group membership), and industry partners like Google. His grants support interdisciplinary projects spanning secure compilation, fairness engineering, and hardware security, while his teaching excellence award reflects commitment to pedagogy in core systems courses. He co-directs Penn State's Institute for Networking and Security Research (INSR), fostering collaboration between systems, security, and AI researchers. The SOS Group maintains active partnerships with industry security teams and contributes to open-source tools for vulnerability detection, with recent work expanding into fairness certification for machine learning pipelines.

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Soner OnderView profile

Professor

Michigan Technological UniversityUnited States

Soner Onder is a Professor in the Department of Computer Science at Michigan Technological University, with an affiliated appointment in the Electrical and Computer Engineering department. His work focuses on computer architecture, programming languages, and simulation techniques, contributing significantly to processor design and memory systems research. Dr. Onder received his PhD in Computer Science from the University of Pittsburgh in 1999. His academic career has established him as a leading researcher in computer architecture with publications spanning two decades in top-tier conferences. Dr. Onder's research spans multiple areas of computer architecture and compiler design, with emphasis on processor design, memory systems, and compiler optimizations. He has made significant contributions to memory disambiguation techniques, branch prediction mechanisms, and energy-efficient processor designs. His work often bridges hardware and software domains, exploring how compiler techniques can better exploit architectural features. Recent research focuses on memory dependence prediction, recovery mechanisms for mispredictions, and energy-efficient data access patterns, with his "Future Gated Single Assignment Form" representing an innovative approach to program representation that bridges compiler design and architectural support. US Patent 7747993: Methods and systems for ordering instructions using future values (2010) Dr. Onder has advised numerous PhD students to completion, including Scott Pomerville (2024), Gorkem Asilioglu (2020), Omkar Javeri (2020), and Zhaoxiang Jin (2018). His research has been supported by grants including "Statically Controlled Asynchronous Lane Execution (SCALE)" and "Vectorized Instruction Space (VIS)" projects. He developed the FAST (Flexible Architecture Simulation Tool) for architectural research and continues to lead an active research program with publications appearing in top-tier venues through 2018. Dr. Onder leads research in computer architecture with a focus on practical implementations. His FAST simulation tool provides a flexible platform for testing architectural innovations. His work often involves collaboration with both compiler researchers and hardware designers to create holistic solutions to performance bottlenecks in modern processors, demonstrating the interdisciplinary nature of his research that bridges hardware and software concerns in computer system design.

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Sarah ImmanuelView profile

Senior Lecturer

Torrens University AustraliaAustralia

Sarah Immanuel is a Senior Lecturer in the Business and Hospitality vertical at Torrens University, specializing in Data Management and Data Analytics. She directs teaching, research, and subject coordination within the Centre for Artificial Intelligence Research and Optimisation (AIRO), leveraging her 23+ years of academic experience across Australian and international institutions. Her educational background includes: Bachelor of Electrical and Electronics Engineering from Bharathiar University Master of Applied Electronics Engineering from Bharathiar University PhD in Biomedical Engineering from The University of Adelaide (dissertation: Polysomnographic signal processing for advanced diagnostics of paediatric sleep disordered breathing) Immanuel's research focuses on biomedical signal processing applications for sleep disorders and clinical diagnostics. She develops machine learning models for disease prediction in sleep disorders, mental health, and cardiovascular conditions, while creating data analytics platforms for healthcare decision-making. Her work integrates Signal and Image Processing with AI to address Digitally Enhanced Living challenges, particularly for elderly populations through ARC Industry Transformation Research Hub projects at Flinders University. Analysis of her 27 research outputs reveals consistent focus on cardiorespiratory dynamics, with recent publications (2023-2024) emphasizing transvenous phrenic nerve stimulation for central sleep apnea, heart rate variability biomarkers for stress/cognitive decline, and machine learning applications for surgical candidate prediction. Her fingerprint shows dominant themes in Central Sleep Apnea (100%), Transvenous Phrenic Nerve Stimulation (100%), and Polysomnography (60%). As an active PhD supervisor, she mentors students in cardiorespiratory signal processing and machine learning for clinical applications. Her research has generated significant community impact through the ARC Hub project on elderly care technologies. Immanuel maintains active research collaborations through Flinders University's Academic status position and contributes to healthcare innovation via the AIRO center's data-driven platforms.

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