Find Academic Supervisors

Angela Demke BrownView profile

Professor

• Operating Systems
• Programming Languages
• Distributed Systems
• +7 more

Angela Demke Brown is a Full Professor in the Department of Computer Science at the University of Toronto. She is cross-appointed to the Faculty of Applied Science and Engineering. Her research focuses on the intersection of programming languages and operating systems, leveraging high-level analysis to enhance low-level systems software performance and reliability. Education : B.Sc., York University M.Sc., University of Toronto Ph.D., Carnegie Mellon University (2005), supervised by Todd Mowry Her research spans critical areas including file system reliability, dynamic binary instrumentation for Linux, spatial database performance, and compiler optimization techniques. She has spearheaded projects like compiler-based memory management, I/O prefetching strategies, and non-volatile memory file systems such as NOVA-Fortis. Her work also extends to distributed systems and non-volatile memory management. Scientific Awards and Recognitions : Carnegie Mellon Doctoral Dissertation Award (PhD thesis) IBM Faculty Fellowship (2004-2007) IBM Centre for Advanced Studies Team of the Year (2005) NetApp Faculty Fellowship Microsoft Research Visiting Researcher (2015-16) Teaching Award, Computer Science Students Union (2008) Active member of ACM, IEEE, and USENIX Professor Demke Brown has supervised numerous graduate students across PhD, Master’s, and undergraduate levels, often in collaboration with Prof. Ashvin Goel. Her professional service includes roles on program committees for conferences like USENIX ATC, ASPLOS, and NSERC scholarship evaluations.

David Black-SchafferView profile

Professor

• Computer Architecture
• Memory Systems
• Parallel Programming
• +4 more

David Black-Schaffer is a Professor at Uppsala University's Department of Information Technology, specializing in computer systems research. As of 2023, he serves as Dean of Research for the Faculty of Science and Technology. His work bridges software and hardware innovations to enhance data movement efficiency in computer systems, with applications commercialized through a startup and integrated into industry standards like OpenCL. Black-Schaffer earned his PhD in Electrical Engineering from Stanford University in 2008, focusing on many-core processor programming. His career spans roles at Apple Inc. (contributing to OpenCL standards), postdoctoral research at Uppsala University, and academic progression from assistant to full professor (2010–2017). He has held leadership roles including Head of the Division of Computer Systems (2022) and department representative on the faculty Advisory Committee for Research (2021). His research spans computer architecture, memory systems, parallel programming, and simulation techniques. Recent publications (2024–2020) explore garbage collection, cache optimization, memory contention, NUMA systems, and instruction scheduling. Key trends include software-hardware co-design for power efficiency, reuse-aware data placement, and machine learning for performance modeling. Knut & Alice Wallenberg Foundation: Wallenberg Academy Fellowship Prolongation (2020–2025), Wallenberg Academy Fellow (2016–2021) Swedish Research Council (VR): Project Grant (2019–2024), Young Researcher Grant (2015–2018), Framework Grant (2012–2017) European Research Council: ERC Starting Grant (2017–2022) Teaching Awards: Uppsala Engineering and Science Student Union Pedagogical Prize (2012), Uppsala University Pedagogical Prize (2016), Uppsala Technical Physics Students' Teaching Award (2019) Other Grants: ScalableLearning flipped classroom project (2012–2020), Arm Ltd. collaborations on memory system designs He pioneered flipped-classroom teaching through the ScalableLearning project, impacting over 80,000 students. His research is conducted in collaboration with institutions like Arm Ltd., with past contributions to Apple's OpenCL implementation and UPMARC research center.

Tilmann RablView profile

Professor

• Stream Processing
• Big Data Management
• End-to-End Machine Learning Pipelines
• +1 more

Tilmann Rabl is a Professor at the Digital Engineering Faculty of the University of Potsdam and holds the chair for Data Engineering Systems at the Hasso Plattner Institute. He is a cofounder and scientific director of the startup bankmark. Rabl earned his PhD at the University of Passau in 2011 and spent four years as a postdoc at the University of Toronto's Middleware Systems Research Group (MSRG). From 2015 to 2019, he served as senior researcher and visiting professor at Technische Universität Berlin's Database Systems and Information Management (DIMA) group and as Vice Director of the Intelligent Analytics for Massive Data (IAM) Group at DFKI. Rabls research interests center on stream processing, big data management, end-to-end machine learning pipelines, and benchmarking data processing systems. His recent work explores hardware-conscious database design, GPU memory optimization, and CPU cache prefetching strategies. EDBT Best Experiments and Analysis Paper Award (2025) ICDE Outstanding Meta-Reviewer (2024) SIGMOD Distinguished Reviewer (2024) EDBT Best Paper Award (2019, 2022) ACM SIGMOD Research Highlight (2022) VLDB Distinguished Reviewer (2022) ICDE Best Paper Award (2021) SIGMOD Best Paper Award (2020) DEBS Grand Challenge & Audience Awards (2020) SIGMOD Distinguished Reviewer (2020, 2024) EDBT Best Demonstration Award (2017) Rabls advising includes Clemens Schielicke, Finn Schöllkopf, and Tobias Jordan, who are working on master's theses in areas like memory bandwidth expansion, SIMD-accelerated sort-merge joins, and probabilistic filters for intermediate data processing. His group also includes PhD students and postdocs across ongoing projects.

Changhee JungView profile

Associate Professor

• Compilers
• Computer Architecture
• Performance Optimization
• +7 more

Changhee Jung is the Samuel D. Conte Associate Professor of Computer Science at Purdue University, Department of Computer Science. His research focuses on compilers and computer architecture with an emphasis on performance, reliability, and security. He joined Purdue in Fall 2019 after serving as an Assistant Professor at Virginia Tech (2013–2019). Prior academic roles include a post at ETRI (2005–2008) and internships at Google (2010–2012). Education: PhD in Computer Science from Georgia Institute of Technology (2013) under Prof. Santosh Pande. His work spans compiler-architecture co-design for intermittent computing, nonvolatile memory systems, and security frameworks like PeX for Linux kernel permission checks. Notable recognitions include the NSF CAREER Award (2018) and induction into the MICRO Hall of Fame (2021). Research interests include energy-efficient computing, fault resilience, and compiler-driven hardware optimizations. His lab, CompArch, emphasizes cross-layer solutions for performance, reliability, and security challenges. Recent projects include IPEX (ISCA 2025), Write-Light Cache (ISCA 2023), and DevFuzz (Oakland 2023). Awards: NSF CAREER, MICRO Hall of Fame, Memorable Paper Finalist (NVMW 2024), Best Student Paper Finalist (SC 2016), and multiple industry awards. Active in service roles, including program chair for LCTES 2020 and editorial roles for ACM journals. Teaching: Courses include CS 352 (Compilers), CS 502 (Compiling Systems), and advanced special topics. Supervised over 15 graduate students and postdocs, with alumni in academia and industry (e.g., Samsung, Intel, Xilinx).

Akshitha SriramanView profile

Assistant Professor

• Computer Architecture
• Hardware-Software Co-design
• Data Center Computing
• +4 more

Akshitha Sriraman is an Assistant Professor in the Department of Electrical and Computer Engineering and Computer Science at Carnegie Mellon University. She holds a PhD in Computer Science from the University of Michigan (2021) and an M.S. in Embedded Systems from the University of Pennsylvania (2015). Her research focuses on bridging computer architecture and systems software to design efficient, sustainable, and equitable data center systems, emphasizing hardware-software co-design. Her work has been deployed in real hyperscale data centers, influencing Intel’s Alder Lake CPU architectures and Infrastructure Processing Unit designs. Recipient of the NSF CAREER Award (2024), Intel Rising Star Award (2023), and multiple dissertation prizes. Advances include reducing global carbon emissions via server design and introducing equity as a first-order design concern in web systems. Advises PhD and Master’s students on topics like sustainable computing, equitable systems, and hardware optimization. Key contributions span energy-efficient data center architectures, bias-free scheduling systems, and cloud GPU power management. She leads a research group prioritizing socially responsible computing and has received grants from NSF, AWS, and industry partnerships.

Mohammad Ali Maddah-AliView profile

Associate Professor

• Information Theory
• Communication Systems
• Distributed Computing
• +5 more

Mohammad Ali Maddah-Ali is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Minnesota Twin Cities. He received his Ph.D. from the University of Waterloo and was a Postdoctoral Fellow at UC Berkeley. His research focuses on information theory, communication systems, distributed computing, and blockchain technology. University of Waterloo (Ph.D.) University of California at Berkeley (Postdoctoral Fellow) Nokia Bell Labs (2010-2020) His work addresses fundamental limits of distributed systems through theoretical advancements like interference alignment, coded caching, and secure multi-party computation. Recent publications emphasize secure aggregation in federated learning and blockchain security. He has received multiple awards including IEEE Fellow (2023), IEEE Jack Keil Wolf Student Paper Award (2017), and IEEE Information Theory Society Paper Award (2016). He has served as associate editor for IEEE Transactions on Information Theory and leads the Maddah Research Group.

• Computer Architecture
• GPU Systems
• Accelerators for Machine Learning
• +4 more

Jose Luis Abellan Miguel is a Ramón y Cajal Fellow and Tenure-Track Associate Professor at the University of Murcia's Department of Computer Engineering and Technology. He leads the EcoArTech team and is a European R3 researcher. Previously, he held roles at the University of Ferrara, Boston University, and Universidad Católica de Murcia. His research focuses on GPU architectures, accelerators for machine learning, and privacy-preserving computing, particularly Fully Homomorphic Encryption (FHE). He has authored over 70 peer-reviewed publications and contributed to conferences like ISCA, HPCA, and MICRO. Education: Bachelor's, Master's, and PhD in Computer Science and Engineering (University of Murcia, 2007–2012) Research Interests: Abellan's work emphasizes architectural enhancements for GPU systems, customized accelerators for ML and FHE, and efficient synchronization/communication in many-core architectures. His contributions include tools like MGPU-Sim and STONNE for simulation, and frameworks like FIDESlib for FHE on GPUs. Recognition: HiPEAC Paper Awards (2011, 2019–2024) Top Picks in Hardware and Embedded Security 2024 European R3 Certificate (2024) Editorial roles at ACM TACO and Frontiers in Electronics Grants & Leadership: Recipient of a Ramón y Cajal fellowship and a Consolidación Investigadora grant. He chairs sessions at conferences like ISPASS and serves on TPCs for venues including DATE, HPCA, and MICRO. His lab collaborates with institutions like Georgia Tech, Northeastern University, and Intel. Labs/Teams: He leads the EcoArTech team, focusing on next-gen computing systems via architectural simulators. Collaborators include researchers from MIT, Boston University, and industry partners like NVIDIA and Intel.

Margo I. SeltzerView profile

Professor

• Systems
• Data Provenance
• File Systems
• +5 more

Margo I. Seltzer is a distinguished academic and researcher in computer science, serving as Co-Head of the Department of Computer Science at the University of British Columbia and Director of the Berkman Klein Center for Internet & Society at Harvard University. She holds prestigious positions such as Canada 150 Research Chair in Computer Systems and Cheriton Family Chair in Computer Science. Her work spans systems research, data provenance, file systems, databases, and healthcare technology. Seltzer has made significant contributions to the field through her research, including co-founding Sleepycat Software (developers of Berkeley DB), which earned the ACM SIGMOD Systems Award in 2020. She is an ACM Fellow and Sloan Foundation Fellow, among other accolades. Her research interests emphasize interpretable machine learning, graph analytics, and reproducibility in computational experiments. Education: A.B. in Applied Mathematics from Harvard/Radcliffe College; Ph.D. in Computer Science from UC Berkeley. Research Interests: Her work focuses on systems, provenance, and healthcare applications. Key areas include program synthesis, graph partitioning, differential privacy, and anomaly detection in healthcare. She has pioneered projects like CamFlow for provenance-aware security and contributed to frameworks like Tribuo for interpretable machine learning. Publications: Her recent work includes advancements in graph partitioning (CUTTANA), memory translation (Velosiraptor), and interpretable models for medical data (HyperBrain). These reflect her interdisciplinary approach, blending systems research with healthcare and AI. Awards: Beyond the ACM and Sloan honors, she has been recognized for teaching excellence, mentoring, and contributions to open-source software. She serves on advisory boards for the Canadian COVID Alert App and the US National Academies' CSTB. Advising & Grants: While currently focused on postdoctoral researchers, Seltzer has mentored numerous students, earning awards for her mentorship. Her grants include funding from the Swedish Research Council and collaborations with industry partners like Intel. Labs/Teams: Active in the Systopia lab at UBC, focusing on systems research, and involved in interdisciplinary initiatives like the Self-Driving Labs project for automated experimentation.

• Computer Architecture
• Heterogeneous Systems
• GPU Computing
• +2 more

Juan Luis Aragón is a Full Professor of Computer Architecture at the University of Murcia. His research focuses on heterogeneous parallel systems, GPU architectures, and energy-efficient designs. He has been a visiting researcher at Princeton University multiple times and has advised 7 PhD theses. Research areas include GPU memory hierarchy optimization, warp scheduling techniques, and hardware-software co-design for efficient computing. Recent work explores tile rendering optimization and OS-level memory management improvements.

Carlos Molina ClementeView profile

Associate Professor

• Computer Architecture
• Mobile and Sensor Networks
• Cloud Computing
• +8 more

Carlos Molina Clemente is an Associate Professor of Computer Architecture at Rovira i Virgili University in Tarragona, Spain. He holds a M.Sc. in Computer Engineering (Universitat Politècnica de Catalunya, 1996) and a Ph.D. in Computer Science (UPC, 2005). His research focuses on Computer Architecture, Mobile/Sensor Networks, and Cloud Computing. He leads the Cloudlab research group and coordinates initiatives like GTDAWIN and BIOGEI. Key research areas include multicore scheduling, LoRaWAN protocols, LIDAR data analysis, and serverless computing. He has published over 50 articles in top-tier conferences/journals and supervised three doctoral theses. His work spans projects on cache architectures, real-time systems, and educational multicomputing solutions. Affiliations include the Department of Computer Engineering and Mathematics (DEIM) at URV, with offices at Campus Sescelades (Avinguda Països Catalans 26, Tarragona). Research highlights include contributions to non-uniform cache policies, predictive mobile network algorithms, and energy-efficient sensor networks.

• Computer Architecture
• Domain-Specific Architectures
• Reconfigurable Computing
• +4 more

Trevor Mudge is a Professor in the Department of Computer Science and Engineering at the University of Michigan. His work focuses on domain-specific architectures, reconfigurable computing, and energy-efficient processors. He leads a research group emphasizing collaborative innovation, with weekly meetings to discuss progress and foster interdisciplinary collaborations with institutions like MIT and Technion. His research interests include hardware-software co-design, near-memory processing, and accelerators for graph analytics and machine learning. He advocates for student autonomy in research direction, encouraging them to explore novel ideas while providing mentorship through frequent one-on-one interactions and 'extreme editing' sessions for manuscript refinement. Dr. Mudge actively supports student internships aligned with their research, particularly in industry partnerships that enhance their academic work. His publications reflect a strong emphasis on specialized architectures for wireless communication, sparse matrix computations, and low-power embedded systems. His group's approach to advising prioritizes flexibility, with communication channels like email, Slack, and virtual whiteboards enabling continuous feedback. Vacations and time away are accommodated with advance notice, emphasizing student well-being and productivity balance.

• Prefetcher Design
• Memory Hierarchy Optimization
• Machine Learning for Digital Systems
• +3 more

Yuanji Ye is a researcher at the Technical University of Munich (TUM) , affiliated with the TUM School of Computation, Information and Technology and the Chair of Integrated Systems . His work focuses on advanced prefetching techniques and memory hierarchy optimization in modern processors. Education: PhD student at LIS (since 2024), M.Sc. in Communications and Electronics Engineering (TUM, 2021–2024), B.Sc. in Electronic Information and Science Technology (UESTC, 2017–2021). Research interests include cache optimization , DRAM bandwidth management , and machine learning applications in prefetching mechanisms . He is actively involved in the CeCaS Project focusing on prefetcher design and has contributed to improving memory access latency through profiling-based policies. In teaching, he supervises the Project Laboratory IC Design (since SS 2025) and guides student research projects such as Prefetching Techniques Based on Machine Learning and Profiling-based Prefetcher Design . His expertise bridges theoretical advancements with practical implementations in digital systems.

• Computer Architecture
• Parallel Computing
• Cache Coherence
• +5 more

Manuel Eugenio Acacio Sanchez is a Professor in the Department of Computer Engineering and Technology at the University of Murcia's Faculty of Informatics. His research focuses on computer architecture, parallel systems, cache coherence, and hardware transactional memory. He earned his Ph.D. from the University of Murcia in 2003 with a thesis on directory-based coherence protocols for distributed-shared memory multiprocessors. Doctorate: Universidad de Murcia (2003) Academic Rank: Professor Research Interests include Hardware transactional memory Cache coherence protocols GPU and DNN accelerators Energy-efficient computing Parallel architectures Recent Article Trends emphasize cycle-level simulation tools (e.g., STONNE), hardware transactional memory optimizations, and neural network accelerator design. His work bridges microarchitectural improvements and application-specific efficiency in multicore systems. Labs & Teams : Affiliated with the Computer Architecture and Parallel Systems research group, previously part of the Architecture and Parallel Computing group.

Alberto Ros BardisaView profile

Professor

• Computer Architecture
• Parallel Computing
• Hardware Optimization
• +6 more

Alberto Ros Bardisa is a Professor at the Department of Computer Engineering and Technology within the Faculty of Informatics at the University of Murcia. He holds a Doctorate from the same university, completing his thesis on Efficient and Scalable Cache Coherence for Many-Core Chip Multiprocessors in 2009. His research focuses on computer architecture , with particular emphasis on cache coherence protocols , hardware transactional memory , speculative execution , and many-core systems . He has contributed to optimizing memory subsystems, concurrency management, and scalability in parallel computing environments. His work often bridges hardware-software co-design to enhance performance and security in modern architectures. Dr. Ros Bardisa is affiliated with the Computer Architecture and Parallel Systems research group and previously contributed to the Architecture and Parallel Computing group. His publications (over 130+ listed) reflect a sustained focus on advancing cache efficiency, transactional memory systems, and speculative execution techniques. His current work explores innovative solutions for fine-grain coherence , secure prefetching , and atomic operation optimization , with recent contributions in 2025 addressing novel protocols like WoperTM and MASCOT.

Calvin LinView profile

Professor

• Computer Architecture
• Parallel Computing
• Programming Languages and Compilers
• +2 more

Calvin Lin serves as a University Distinguished Teaching Professor at the University of Texas at Austin, concurrently directing the Turing Scholars Honors Program and coaching UT's Men's Ultimate Frisbee team. His career uniquely integrates cutting-edge research in computer systems with transformative educational initiatives. His academic foundation includes: BS from Princeton University PhD from the University of Washington Lin's research spans computer architecture, parallel computing, programming languages, compilers, security, and privacy, with recent emphasis on computer science education. His work consistently addresses performance optimization challenges across hardware-software boundaries, particularly in memory systems and processor design, while pioneering efforts to modernize K-12 CS curricula through NSF funding. Publication trends reveal enduring focus on system-level efficiency: early breakthroughs in machine learning-based branch prediction (2001) evolved into contemporary innovations in data prefetching and GPU synchronization. His articles demonstrate methodological progression from theoretical compiler techniques to practical security-aware architectures, maintaining relevance across 20 years of computing evolution. Recognition for his dual excellence includes: William David Blunk Memorial Professorship (2019) President’s Associates Teaching Excellence Award (2015) Senior Provost Teaching Fellow (2015) UT Academy of Distinguished Teachers (2013) Jean Holloway Award for Excellence in Teaching (2013) Best Paper Award, Eurographics Symposium on Parallel Graphics and Visualization (2012) University of Texas Regents’ Outstanding Teaching Award (2011) Best Paper Award, International Symposium on Code Generation and Optimization (2011) Best Paper Award, ACM SIGPLAN Conference on Programming Language Design and Implementation (2007) IEEE Micro Top Picks (2006) HPCA Test of Time Award (2019) As Turing Scholars Director, Lin mentors elite undergraduate researchers while leading an NSF grant to redesign high school CS education. His advising extends beyond traditional graduate supervision into curriculum development and competitive programming initiatives, fostering talent pipelines from secondary education through doctoral research. Beyond formal academic roles, Lin cultivates community engagement through Ultimate Frisbee coaching and maintains active research collaborations. His current work focuses on security-enhanced architectures and compiler-driven performance optimization, positioning his team at the intersection of hardware innovation and educational outreach.