Find Academic Supervisors

Daniel GenkinView profile

Associate Professor

• System Security
• Cryptography
• Side-Channel Attacks
• +7 more

Daniel Genkin is an Associate Professor at the School of Cybersecurity and Privacy and School of Computer Science at Georgia Institute of Technology. His research spans system security, cryptography, side-channel attacks, hardware security, cryptanalysis, secure multiparty computation (MPC), verifiable computation, and SNARKs. He holds a PhD in Computer Science from the Technion - Israel's Institute of Technology and was awarded the 2024 Sloan Research Fellowship. His work focuses on microarchitectural vulnerabilities, including Rowhammer , Cache Timing , and Speculative Execution attacks. Notable contributions include co-discovering Spectre and Meltdown vulnerabilities. He has received multiple awards, including Distinguished Paper Awards , IEEE Micro Top Picks , and Black Hat Pwnie Awards . Publications highlight trends in Side-Channel Analysis , Hardware Exploitation , and Cryptographic Implementations . His email is genkin@gatech.edu , and he actively seeks students for research in security and cryptography.

Ozcan OzturkView profile

Professor

• Heterogeneous Computing
• Hardware Accelerators
• GPU Computing
• +7 more

Ozcan Ozturk is a Professor in the Computer Science and Engineering and Electronics Engineering programs at Sabancı University's Faculty of Engineering and Natural Sciences. Previously, he held professorships at Bilkent University and adjunct roles at North Carolina State University. His expertise spans heterogeneous computing, parallel systems, processor architecture, and compiler optimization. He earned his Ph.D. from Penn State University, with prior academic roles at the University of Florida and internships at Intel and Marvell. Education: Ph.D. in Computer Science and Engineering (2007), Pennsylvania State University M.S. in Computer Engineering (2002), University of Florida B.Sc. in Computer Engineering (2000), Bogazici University Research interests include accelerator technologies, GPU-based systems, multicore processors, and compiler optimizations. His work focuses on improving parallelization efficiency, energy optimization, and reliability in heterogeneous architectures. He leads funded projects like 'Machine Learning for Compiler Flags' and 'Graph Accelerator Design'. Notable awards include the Bilkent Teaching Award (2019), BAGEP (2018), and HiPEAC Paper Award (2016). He serves on editorial boards of IEEE and ACM journals and chairs major conferences like ASPLOS and ICS. Grants and collaborations include partnerships with Huawei, Intel, NVIDIA, and TÜBİTAK. He advises over 20 students and has supervised projects in safety-critical systems, FPGA accelerators, and compiler-directed optimizations. His lab develops domain-specific architectures, including RISC-V extensions for graph processing.

Tosiron AdegbijaView profile

Associate Professor

• Computer Architecture
• Embedded Systems Design
• Low-Power Embedded Systems
• +14 more

Tosiron Adegbija is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Arizona, where he serves as Director of Graduate Studies and Thomas R. Brown Endowed Fellow. He is a member of the Graduate Faculty and actively contributes to research and teaching in computer architecture and embedded systems. Education: PhD in Electrical and Computer Engineering, University of Florida, 2015 MS in Electrical and Computer Engineering, University of Florida, 2011 BS in Electrical Engineering, University of Ilorin, Nigeria, 2005 His research centers on energy-efficient computing with a focus on bio-inspired computer architecture , including spiking neural network (SNN) accelerators and in-memory computing. He also explores domain-specific architectures , adaptable memory systems , and microprocessor optimizations for IoT . His work leverages novel memory technologies like STT-RAM to enhance performance and reduce energy consumption in embedded and resource-constrained systems. Recent publications highlight trends in hybrid SNN acceleration, domain-specific accelerator generation, and system-level design space exploration. His research is increasingly focused on neuromorphic computing, automated hardware design, and ultra-efficient architectures using emerging materials like antiferromagnetic tunnel junctions. Scientific Awards: National Science Foundation (NSF) CAREER Award (2019) Elected IEEE Senior Member (2020) Best Paper Award at IEEE ISVLSI (2014) Teaching Award, University of Arizona (2018) ACM GLSVLSI Travel Award (2015) He advises numerous graduate and undergraduate students, many of whom have pursued careers at institutions like Pacific Northwest National Labs, Micron Technology, and Amazon. He has secured significant funding, including a $1.9M NSF FuSE2 grant for energy-efficient computing. His lab collaborates with UA Physics, CMU, and UNL. He has also developed educational tools for Chipyard and RISC-V, supporting hands-on learning in computer architecture. Labs and Research Teams: Leads a research group focused on bio-inspired and domain-specific computing, fostering innovation in energy-efficient hardware. The lab emphasizes hardware/software co-design, neuromorphic engineering, and real-world deployment in IoT and biomedical applications.

Kyle C. HaleView profile

Associate Professor

• Operating Systems
• High-Performance Computing
• Computer Architecture
• +4 more

Kyle C. Hale is an Associate Professor at Oregon State University's School of Electrical Engineering and Computer Science (College of Engineering). He holds a Ph.D. and M.S. from Northwestern University (2016, 2013) and a B.S. in Computer Science from UT Austin (2010). Prior to joining Oregon State in 2024, he served as an Associate Professor at Illinois Tech in Chicago. His research spans operating systems, high-performance computing (HPC), virtualization, computer architecture, and system security. Current work focuses on specialized system software stacks for emerging computing paradigms like memory disaggregation and parallelism optimization. He leads the HExSA Lab and collaborates with the HiPCastor group. Scientific Awards: NSF CAREER Award (2023-2028) Illinois Tech College of Computing Excellence in Research (2023) Illinois Tech College of Computing Excellence in Teaching (2021) Illinois Tech Department of Computer Science Teacher of the Year (2020) EuroSys '22 Best Artifact Award Recent Research Trends: His publications emphasize compiler techniques for memory-disaggregated systems, optimizing parallel runtimes through hardware-software integration, virtualization at fine granularities, and accelerating machine learning workloads via system-level innovations. Keywords include HPC, virtualization, parallelism, and secure execution contexts. Teaching: Courses taught include Computer Architecture (CS/ECE 472), System Security (CSP 544), Operating Systems (CS 450), and advanced topics in serverless/edge computing. He actively recruits PhD students to the HExSA Lab.

• Edge Computing
• Fog Computing
• Distributed Systems
• +5 more

Umakishore Ramachandran is a Professor in the School of Computer Science within the College of Computing at Georgia Institute of Technology. His research spans edge computing, distributed systems, and real-time video analytics, with significant contributions to fog computing infrastructure, mobile systems, and sensor networks. Over a prolific 38-year career, he has authored 142 publications with major contributions in 2022-2025. His research interests focus on bridging the gap between cloud and edge computing, with pioneering work in video analytics systems like EVA and MicroEdge. He investigates resource optimization for latency-sensitive applications, developing novel approaches for load shedding, data management, and container runtime efficiency at the network edge. His work addresses fundamental challenges in distributed camera networks, autonomous vehicle systems, and real-time stream processing. Ramachandran's recent publications reveal a strong emphasis on practical edge computing solutions, with 75% of his 2021-2025 work focusing on video analytics and infrastructure optimization. His research shows increasing collaboration with industry partners while maintaining academic rigor, with publications appearing in top venues like SIGMOD, Middleware, and DEBS. The work consistently addresses real-world constraints of resource-constrained edge environments. Ramachandran has mentored numerous researchers who have become principal investigators on edge computing projects, with notable collaborators including Harshit Gupta, Enrique Saurez, and Zhuangdi Xu appearing as first authors on multiple papers. His work has received significant grant support for projects related to mobile fog computing and distributed video analytics. He leads research in the Edge Computing Laboratory at Georgia Tech, focusing on the development of practical frameworks for real-world deployment of edge infrastructure. Current projects include eCAV for connected autonomous vehicles and MicroEdge for multi-tenant camera processing systems.

Heiner LitzView profile

Associate Professor

• Computer Architecture
• Computer Systems
• Hardware-Software Interface
• +3 more

Heiner Litz is an Associate Professor in the Computer Science & Engineering Department at UC Santa Cruz's Baskin School of Engineering. He holds the Kumar Malavalli Endowed Chair of Storage Systems Research and serves as Director of the Center for Research in Storage Systems (CRSS). He is also a member of UCSC's Hardware Systems Collective (HSC). Litz earned his PhD from Mannheim University and previously held positions at MIT, Google, and Stanford University. His research focuses on computer architecture and systems optimization , specifically improving hardware-software interfaces for data center workloads. Key areas include microarchitectural mechanisms (branch prediction, prefetching, cache design), profile-guided optimizations, and storage/disaggregated memory systems. His work bridges compiler techniques and hardware efficiency for emerging cloud applications. Recent publications emphasize profile-guided optimization across microarchitecture layers, storage scalability, and resource allocation in distributed systems. Trends include hardware-software co-design for data centers, RDMA-based protocols, and real-time control systems. Awards & Honors: Kumar Malavalli Endowed Chair of Storage Systems Research Best Paper Award at MICRO (2022) IEEE Micro Top Picks (2019, 2023) Best Paper Awards at ICPP (2008) and ARC (2009) Advising & Grants: He currently advises 11 PhD students and has graduated 8 MS/PhD students. Research is supported by NSF, Intel, Samsung, Google, Meta, Nutanix, HPE, ARM, Marvell, Cerabyte, Western Digital, and Broadcom. Labs & Teams: Directs CRSS, focusing on storage systems innovation, and collaborates with HSC on hardware-software integration projects.

David I. AugustView profile

Professor

• Compilers
• Computer Architecture
• Parallel Processing
• +4 more

David I. August is a Professor of Computer Science at Princeton University, affiliated with the Department of Electrical Engineering. He earned his Ph.D. from the University of Illinois at Urbana-Champaign in 2000. His research focuses on compilers and computer architecture, emphasizing synergistic design between compilers and microarchitecture. He leads the Liberty Research Group, which explores topics such as automatic parallelization, memory profiling, and speculative execution. August joined Princeton in 1999 as a lecturer, advancing to full professor in 2012. He has served as program chair for MICRO 2009 and on committees for ISCA, PLDI, and ASPLOS. His notable accolades include the IEEE Fellow designation, Best Paper Awards at PLDI and CGO, and teaching awards from Princeton's School of Engineering. His work spans compiler optimizations, hardware-software co-design, and security architectures like TrustGuard. Recent research includes GPU scheduling (GhOST), memory profiling frameworks (PROMPT), and instruction prefetching (PDIP). He advises over 20 graduate students, many now leading roles at tech companies and academia. August teaches courses such as COS-126 (Intro to CS), COS-375 (Computer Architecture), and graduate seminars. His projects often bridge theory and practice, with tools like NOELLE and Liberty Research Group initiatives advancing compiler infrastructure and parallelism extraction.

Nils Ole TippenhauerView profile

Professor

• Cyber-Physical System Security
• Industrial Control Systems Security
• Physical-Layer Security
• +7 more

Nils Ole Tippenhauer is a faculty member at the CISPA Helmholtz Center for Information Security , leading the SCy-Phy research group . His academic journey includes an Assistant Professorship at the Singapore University of Technology and Design (SUTD) (2014–2018), a PhD in Computer Science from ETH Zurich (2012), and a Diploma in Computer Engineering from Hamburg University of Technology (2007). He also holds an exchange study year at the University of Waterloo (2004–2005) supported by a DAAD scholarship. Research Interests focus on practical systems security , particularly Security of Cyber-Physical Systems Industrial Control Systems (ICS) and Industrial IoT (IIoT) Physical-Layer Security and Wireless Security Privacy-Preserving Technologies (e.g., DP3T project) Embedded Systems Security Threat Detection & Defenses His work integrates both theoretical and applied approaches, addressing vulnerabilities in critical infrastructures like water systems and power grids. Recent Publications highlight trends in Anomaly detection evasion in industrial networks Microarchitectural side-channel defenses Localization techniques in cellular networks Security analysis of ICS protocols Data-driven vulnerability assessments for robotics Cyber-physical simulation for infrastructure security Scientific Awards include Best paper at DIMVA'23 Distinguished Paper at ACSAC 2022 Best paper at CPSIOTSEC 2022 Best paper at CPSS 2017 K-H Ditze Award for diploma thesis (2007) SG Mark Institution award (2016) Runner-Up at smart energy hackathon (2013) Advising and Grants feature PhD defenses of Daniele Antonioli and Hamid Reza Ghaeini (2022), co-organizing conferences like WiSec and CPSS , and leading projects such as the National Science Experiment (NSE) with 50,000 mobile sensors in Singapore. He also contributed to the DP3T project for privacy-preserving contact tracing. Labs and Teams include the SCy-Phy research group at CISPA and the development of testbeds like SWaT (Secure Water Treatment), WADI (Water Distribution), and EPIC (Electric Power and Industrial Control) at SUTD. These platforms enable hands-on security research in realistic industrial environments.

Christian RossowView profile

Professor

• Software Security
• System Security
• Network Security
• +15 more

Christian Rossow is Faculty at CISPA – Helmholtz Center for Information Security in Dortmund, Germany, where he leads the System Security research group. He holds dual academic appointments as a professor in the Computer Science department at Saarland University and as an honorary professor at TU Dortmund University. His research spans systems, software, and network security, with a focus on cyber attacks, defenses, and privacy. Research Interests: His primary research areas include software and system security (e.g., exploitation techniques, compiler-assisted defenses, AI-assisted (in)security), network security (e.g., DDoS mitigation, attack attribution, traffic analysis), and cybercrime (e.g., malware analysis, data-driven studies). He emphasizes foundational research with practical applications. Publication Trends: His recent work (2023–2025) shows a strong focus on microarchitectural attacks (e.g., cache side-channels, prefetcher analysis), browser and web security (e.g., sandbox escapes, CSS fingerprinting), network protocol vulnerabilities (e.g., TCP spoofing, infinite loops), and applied cryptography (e.g., ISA extensions for key management). His research consistently targets top-tier venues like IEEE S&P, USENIX Security, ACM CCS, and NDSS. Distinguished Paper Award at IEEE EuroS&P 2021 Best Student Paper Award at MIT Spam Conference 2010 Advising and Grants: He actively supervises PhD students and postdoctoral researchers, with alumni placed in industry (NVIDIA, Crowdstrike, Continental) and academia. His research is supported by major grants including EU H2020 SISSDEN, BMBF-funded BOB, DFG-funded anonymous communication, and RAMSES. He regularly serves in leadership roles in the community, including PC Chair for RAID 2022/2023 and USENIX WOOT 2018, and Track Chair for ACM CCS 2026. Labs and Teams: He leads the System Security research group at CISPA, a world-leading institution for security and privacy. The group comprises talented full-time researchers and focuses on cutting-edge research with strong individual supervision and worldwide collaborations.

• Databases
• Programming Languages
• Compilers
• +7 more

Amir Shaikhha is an Associate Professor (Reader) in the School of Informatics at the University of Edinburgh. He was previously an Assistant Professor (Lecturer) at the same institution from 2020 to 2024 and a Departmental Lecturer at the University of Oxford until August 2020. He is also a Junior Research Fellow at University College, Oxford. His academic journey began with a Ph.D. from EPFL in 2018, where he was awarded the Google Ph.D. Fellowship in structured data analysis and a Ph.D. thesis distinction. His research centers on the design and implementation of data-analytics systems, drawing upon techniques from databases, programming languages, compilers, and machine learning. He develops high-performance systems such as SDQL.py, StructTensor, and VecHT, focusing on the compilation of data science workloads and optimization of tensor operations. His work bridges the gap between high-level abstractions and efficient execution, particularly in sparse and probabilistic computing domains. The recent publications highlight a strong trend in compiler-driven optimizations for data-intensive applications, including automatic differentiation, loop fusion, probabilistic programming, and domain-specific language (DSL) restaging. His research integrates machine learning for systems decisions and emphasizes reproducibility and performance. He has published consistently in top venues like PLDI, OOPSLA, SIGMOD, and CGO, reflecting sustained impact in programming languages and database systems. Dahl-Nygaard Junior Prize, 2025 Google Research Scholar Award, 2025 Most Influential Paper Award, GPCE 2024 Best Paper Award, GPCE 2017 Most Reproducible Paper Award, SIGMOD 2017 Google Ph.D. Fellowship, 2017 Amir Shaikhha has advised PhD students including Hesam Shahrokhi and has been nominated for Best Supervisor of the Year at the University of Edinburgh. He leads research projects that have received recognition and support through awards and grants, including the Google Research Scholar Award. He actively serves the community through program committees (e.g., GPCE, DBPL, DRAGSTERS), editorial roles, and peer review for premier journals. His leadership in organizing workshops and conferences underscores his role as a central figure in the programming languages and databases research communities. He leads a research group focused on compiler and database systems, with recent open-source releases such as StructTensor and VecHT. His team collaborates with researchers from institutions like MIT, EPFL, and TU Berlin, and he co-chairs workshops like Sparse@PLDI and DRAGSTERS. His lab emphasizes innovation in how data-intensive programs are compiled and executed efficiently across modern hardware.

Alaa AlameldeenView profile

Associate Professor

• Computer Architecture
• Memory Systems
• Hardware Security
• +5 more

Alaa Alameldeen is an Associate Professor in the School of Computing Science at Simon Fraser University (SFU), part of the Faculty of Applied Sciences. Previously, he worked as a Research Scientist at Intel Labs (2006–2020) and held an Adjunct Faculty position at Portland State University (2008–2018). He earned a PhD in Computer Sciences from the University of Wisconsin-Madison (2006), and earlier degrees from Alexandria University, Egypt. His research focuses on computer architecture, including memory systems (processing-in-memory, cache/memory compression, security), energy-efficient architectures, and hardware-software co-design for machine learning. He advises PhD and MSc students in these areas and teaches advanced computing science courses. Key contributions include innovations in memory hierarchies, cache compression techniques, and mitigating hardware vulnerabilities. His work has been published in top conferences (e.g., ISCA, MICRO, HPCA) and patented in areas like near-memory processing and error correction. Alameldeen currently leads a research group exploring secure and high-performance memory architectures. He has supervised multiple graduate students, with many progressing to roles at leading tech companies and academic institutions.

Timothy M. JonesView profile

Professor

• Compilers
• Computer Architecture
• Binary Modification
• +3 more

Timothy M. Jones is a Professor of Computer Architecture and Compilation at the University of Cambridge Computer Laboratory, where he leads research in systems-level computing. He is also a Fellow at Gonville and Caius College, contributing to academic leadership and student mentorship within the collegiate system. His primary affiliation with the Computer Laboratory positions him at the forefront of systems research within the university. Dr. Jones's research focuses on extracting various forms of parallelism (thread-level, data-level, memory-level) to enhance computational performance while addressing energy efficiency and reliability challenges. His work spans compiler design, binary translation, and microarchitecture optimization, with specific interest areas including: Compiler technologies for functional and parallel programming Hardware reliability and fault tolerance mechanisms Binary analysis and instrumentation frameworks Memory system optimization and virtual memory management Security enhancements through binary modification Runtime systems for heterogeneous architectures Analysis of his recent publications reveals strong emphasis on systems-level innovation, particularly in fault tolerance techniques, binary analysis tools, memory optimization, and parallel execution frameworks. His work consistently bridges theoretical computer science with practical hardware implementation challenges. Dr. Jones maintains active participation in the academic community through conference leadership roles, including serving as Program Co-Chair for CGO 2026 and committee positions at premier venues including ISMM, CGO, and ECOOP. He contributes to open-source academic resources through GitHub and maintains professional engagement via Twitter.

Chang Hyun ParkView profile

Assistant Professor

• Virtual Memory Systems
• Address Translation
• Cache Hierarchy
• +7 more

Chang Hyun Park is an Assistant Professor at the Department of Information Technology, Uppsala University, where he is part of the Uppsala Architecture Research Team. His research focuses on computer architecture with emphasis on memory systems, virtualization, and system software optimization. Dr. Park completed his doctoral studies at KAIST (Korea Advanced Institute of Science and Technology) in South Korea, where he was advised by Professor Jaehyuk Huh. Prior to his current position, he served as a post-doctoral researcher at Uppsala University working with Professor David Black-Schaffer. Dr. Park's research spans several critical areas in computer architecture and systems: Virtual memory systems and address translation mechanisms Cache hierarchy optimization and memory systems design Support for non-volatile memory and heterogeneous memory systems Virtualization technology and optimizations for cloud environments High-speed I/O device integration and accelerator support His publication record demonstrates a consistent focus on improving memory system performance, particularly in virtualized environments. Over the past decade, his work has evolved from fundamental virtual memory optimizations to addressing challenges in emerging memory technologies and large-scale system architectures. Recent publications show increasing emphasis on heterogeneous memory systems, graph processing workloads, and hardware-software co-design approaches. Dr. Park actively collaborates with researchers at Uppsala University, particularly with Professor David Black-Schaffer, and maintains connections with his alma mater KAIST. His work appears regularly in top-tier computer architecture conferences including ISCA, MICRO, ASPLOS, and MEMSYS.

David WentzlaffView profile

Professor

• Computer Architecture
• Green Computing
• Cloud Computing
• +6 more

David Wentzlaff is a Professor of Electrical and Computer Engineering at Princeton University, with associated faculty roles in Computer Science and the High Meadows Environmental Institute (HMEI). He leads research in computing architecture, green computing, and sustainable system design. As Director of Undergraduate Studies, he shapes educational programs in his field. Education: Ph.D., Electrical Engineering, MIT (2012) M.S., Electrical Engineering and Computer Science, MIT (2002) B.S., Electrical Engineering, University of Illinois at Urbana-Champaign (2000) Research Focus: Future Computing Systems: Designing manycore architectures, cloud computing infrastructure, and chiplet-based systems for exascale computing. Sustainability: Developing energy-efficient hardware, recyclable computing systems, and eco-friendly decommissioning strategies. Hardware-Software Co-Design: Exploring FPGA integration, in-memory computing, and parallel processing frameworks. Advising & Grants: Advises 8 current graduate students, focusing on topics like chiplet design, neural acceleration, and sustainable computing. Recipient of NSF grants for projects like OpenPiton (open-source manycore research platform) and CAREER awards for energy-efficient architectures. Labs & Collaborations: Leads the Wentzlaff Research Group at Princeton. Develops open-source frameworks like PRGA (FPGA prototyping) and OpenPiton (manycore processor).

Rajeev BalasubramonianView profile

Professor

• Computer Architecture
• Memory Systems
• DRAM/NVM Technologies
• +7 more

Rajeev Balasubramonian is a Professor and Associate Director at the School of Computing, University of Utah. He specializes in computer architecture, with a focus on memory systems, emerging technologies, and energy-efficient computing. His research addresses challenges in DRAM/NVM architectures, security, and acceleration for big data and machine learning workloads. Education: PhD in Computer Science (University of Rochester, 2003), M.S. (University of Rochester, 2000), B.Tech in Computer Science (IIT Bombay, 1998). Research Interests: Memory reliability, near-data processing, cache hierarchies, transactional memory, and hardware-software co-design for emerging technologies. He has led projects on crossbar accelerators, secure memory systems, and resistive memory architectures. Recent Trends in Publications: Focus on encrypted inference (Hyena), data prefetching (PATHFINDER), and neuromorphic computing (SpinalFlow). His work bridges hardware and software, emphasizing practical acceleration and security solutions. Awards: IEEE Fellow (2021), Google Faculty Awards (2019/2020), Intel Research Award (2017), and multiple best paper awards (ISCA, ISPASS, PACT). Grants & Students: Over $4M in NSF/industry funding. Advised 15+ PhD students (e.g., Ali Shafiee, Karl Taht) and currently mentors researchers in resistive memory and security accelerators. His lab includes teams like Utah Arch Research Group. Labs & Teams: Leads the Utah Arch Research Group , organizing workshops on near-data processing and memory systems (e.g., ISCA, HPCA).