Rafael Medina MorillasView profile
Researcher
Rafael Medina Morillas is a researcher at the Embedded Systems Laboratory (ESL) at Ecole Polytechnique Fédérale de Lausanne (EPFL), where he focuses on computer architecture and hardware acceleration for edge AI systems. His research addresses the memory wall problem through innovative architectural designs that improve energy efficiency and performance in data-intensive applications. His primary research interests include: Compute-near-Memory architectures Hardware acceleration for machine learning Edge AI systems Chiplet architectures and interconnects Wireless communication for computing systems Medina Morillas' publication record demonstrates significant advancements in memory systems and hardware acceleration. His work on SideDRAM shows up to 83% EDAP reduction compared to state-of-the-art designs, while his research on wireless communication achieves up to 2.64x speedup for deep neural networks. His recent publications focus on structured pruning techniques for transformers, co-design frameworks for edge AI, and thermal management solutions for heterogeneous systems. His research is supported by collaborations with IMEC, Université de Bordeaux, and HEIG-VD, as well as funding from EC H2020 projects and the ACCESS-AI Chip Center. These partnerships enable comprehensive exploration of architectural innovations across different technology domains. As evidenced by his doctoral thesis 'System-aware Architectural Co-design to Tackle the Memory Wall,' Medina Morillas takes a cross-layer approach to system design, integrating hardware and software optimizations to address fundamental bottlenecks in modern computing systems. His work demonstrates how system-aware architectural design can achieve improvements in runtime, energy consumption, and thermal behavior for data-intensive applications.


