John Wickerson is a Senior Lecturer in the Department of Electrical and Electronic Engineering at Imperial College London. His research spans formal methods, concurrency, and hardware/software synthesis. Academic Rank: Senior Lecturer Affiliation: Imperial College London His research interests include concurrency semantics, weak memory models, transactional memory, GPU and FPGA programming, and high-level synthesis for hardware accelerators. These areas intersect formal verification, programming language design, and hardware-software interface optimization. The publications of John Wickerson reflect trends in formalizing memory models, improving hardware synthesis reliability, and testing concurrency frameworks. His work addresses challenges in quantum compiler validation, GPU workgroup progress, and weak memory persistency across Intel, ARM, and C++ architectures. He actively contributes to academic communities as a Publicity Co-Chair and Session Chair in conferences like POPL and as a Committee Member in SPLASH and PLDI. His GitHub repository activity and X (Twitter) presence further demonstrate his engagement in technical dissemination.
Steve Zdancewic is the Schlein Family President's Distinguished Professor and Associate Chair in the Department of Computer and Information Science at the University of Pennsylvania. His research spans programming languages, computer security, formal verification, and type theory, with significant contributions to LLVM verification, program synthesis, and quantum programming. He co-leads Penn's Programming Languages Research Group with Benjamin Pierce and Stephanie Weirich. His research focuses on: Programming language foundations (type theory, linear logic, semantics) Formal verification (Coq, LLVM, interaction trees) Security (information-flow control, memory safety) Emerging paradigms (quantum programming, secure distributed systems) Publication trends reveal deep engagement with formal methods (67%), programming language design (20%), and systems security (13%), primarily using Coq for mechanized verification. Recent works demonstrate increased focus on parallel/streaming computation and synthesis techniques. Awards Distinguished Paper Awards (ECOOP 2023, POPL 2020) Schlein Family President's Distinguished Professor (2021) Lindback Distinguished Teaching Award (2018) IEEE MICRO Top Picks (2013) Sloan Fellowship (2009-2010) NSF CAREER Award (2004) Best Paper Awards (SOSP 2001, ICFP 1999) Research Leadership Directs multiple NSF-funded projects including DeepSpec (verified systems infrastructure), Vellvm (LLVM semantics), and ExCAPE (program synthesis). Advises 5 PhD students and 31 former advisees/postdocs. Served as General Chair for POPL 2025 and associate chair for PLDI/ICFP/POPL. Infrastructure Leads the Vellvm project developing Coq-based LLVM semantics, the Interaction Trees framework for recursive/impure programs, and Qwire for quantum circuit verification. Maintains active collaborations with Galois Inc. and INRIA.
Matthew Fluet is an Associate Professor and Graduate Program Director in the Department of Computer Science at Rochester Institute of Technology's Golisano College of Computing and Information Sciences. He received his PhD in Computer Science from Cornell University and his BS in Mathematics from Harvey Mudd College. Prior to joining RIT, he was a research assistant professor at the Toyota Technological Institute at Chicago. Dr. Fluet's research focuses on programming languages, with particular emphasis on: Functional programming Compiler construction Program analysis Type systems Parallelism and concurrency His research has resulted in several significant projects including Manticore (a heterogeneous-parallel functional programming language), MaPLe/MPL (a functional language for provably efficient and safe multicore parallelism), and contributions to MLton (a whole-program optimizing Standard ML compiler). His work is supported by multiple National Science Foundation grants. Dr. Fluet has published extensively in top programming languages conferences including ICFP, POPL, PLDI, and PPoPP. His recent work focuses on automatic parallelism management, type-and control-flow analysis, and memory management for parallel systems, demonstrating a consistent research trajectory in making parallel programming safer and more accessible through language design. His notable research grants include: National Science Foundation (CISE Research Infrastructure): $224,329 (2014-2017) National Science Foundation (Software and Hardware Foundations): $236,744 (2014-2018) National Science Foundation: $412,261 (2011-2014) National Science Foundation: $91,867 (2008-2012) Dr. Fluet actively mentors graduate students, currently advising several MS project and thesis students. He teaches courses including Programming Skills (with focus on Rust), Compiler Construction, and Programming Language Concepts. He also serves in leadership roles including as Graduate Program Director for the Computer Science MS program and participates in departmental governance through the CS Curriculum Committee and GCCIS Curriculum Committee. He is an active member of the programming languages community, having served on program committees for major conferences and as Information Director for ACM SIGPLAN (2015-2018), demonstrating his commitment to advancing the field through research, education, and community service.
Kian Pokorny serves as Professor of Computing at McKendree University, maintaining an office in Clark Hall 200 with contact phone (618) 537-6440. His academic foundation includes a Ph.D. from Louisiana Tech and dual degrees (M.S., B.S.) from Central Missouri State University. Education background: Ph.D., Louisiana Tech M.S., Central Missouri State University B.S., Central Missouri State University His research spans Artificial Intelligence , Soft Computing , Data Science , and Computer Science Education , driven by the philosophy: "My highest priority as an educator is to produce lifelong learners with strong critical thinking skills. This I hope to accomplish by creating a non-threatening, student-centered environment within my classroom that allows students to achieve the highest possible levels of learning." This commitment manifests in curriculum innovations and educational tool development. Analysis of his 15 most recent publications reveals consistent focus on computer science pedagogy evolution. Key trends include: integration of data science into traditional curricula (2022), machine learning applications for institutional analysis (2021), and sustained development of the Frances tool suite for computer architecture education (2009-2012). His work bridges theoretical computer science with practical educational implementation, demonstrating particular strength in constraint satisfaction problems and fuzzy logic applications. Scientific recognition: ACI Grant for Intelligent Tutoring Systems Design: An Empirical Approach (2005-2006) While specific student advisees aren't documented, his extensive publication record in educational methodology suggests significant mentorship impact. The ACI grant specifically supported research into adaptive learning systems, indicating early recognition of his contributions to educational technology innovation. No laboratory facilities or research teams are referenced in available materials.
Shing-Chi Cheung is a Professor of Computer Science and Engineering at the Hong Kong University of Science and Technology (HKUST), School of Engineering. He founded the CASTLE research group and co-founded the International Workshop on Automation of Software Testing (AST) in 2006. His leadership includes serving as General Chair of FSE 2014 and chairing multiple APSEC conferences. His research focuses on software quality enhancement through program analysis, testing, debugging, and AI techniques, targeting Android apps, open-source software, deep learning systems, smart contracts, and spreadsheets. Current projects include metamorphic testing frameworks, binary analysis tools, and vulnerability detection systems for emerging technologies. His publication portfolio demonstrates consistent contributions to software engineering since 2016, with recent work emphasizing AI-integrated testing methodologies, smart contract security, and deep learning system reliability. Key trends show increasing focus on cross-language analysis, data visualization quality, and compiler-level verification for modern software stacks. Distinguished Member of the ACM Fellow of the British Computer Society Editorial board member: Science of Computer Programming (SCP), Journal of Computer Science and Technology (JCST) Former editorial board member: IEEE Transactions on Software Engineering (2006-2009), Information and Software Technology (2012-2015) Four patents in China and the United States Cheung actively mentors through the CASTLE research group and serves on program committees for major conferences including ICSE, ESEC/FSE, and ISSTA. His work bridges academic research with practical applications through industry collaborations and tool development. He has contributed to numerous workshops and symposia as steering committee member and program chair.
Zhiyun Qian is the Everett and Imogene Ross Professor in the Department of Computer Science and Engineering at the University of California Riverside. His research bridges academic security research with practical hacking techniques, focusing on vulnerability discovery and analysis across operating systems, networks, and mobile platforms. His primary research interests include: System security: Automated cyber attacks/defenses, kernel vulnerability discovery, and security tool development Network security: TCP side channels, multi-path TCP flaws, and firewall evasion techniques AI/ML applications for security: LLM-integrated static analysis and reinforcement-learning-based fuzzing His work has led to critical discoveries including unfixable TCP side channel vulnerabilities (CVE-2016-5696) recognized with GeekPwn awards. His research methodology combines program analysis, reverse engineering, fuzzing, model checking, and machine learning to build practical security systems. Notable scientific awards include: GeekPwn 2016 most creative idea award Geekpwn 2017 winner award Applied Networking Research Prize Professor Qian actively mentors students in security competitions including Pwn2Own and GeekPwn. He serves on prestigious program committees including IEEE Security and Privacy (Oakland), ACM CCS, and USENIX Security. His teaching portfolio includes graduate courses CS 254 (Network Security) and CS 255 (Computer Security), along with undergraduate courses CS 153 (Operating Systems) and CS 165 (Computer Security). He leads the SecLab research group at UCR (GitHub: seclab-ucr, 3824★) developing security tools for kernel and Android ecosystems. Current projects focus on LLM-enhanced static analysis, precise vulnerability detection, and automated patch testing.
Yao Wan is an Associate Professor at the School of Computer Science and Technology, Huazhong University of Science and Technology (HUST) in Wuhan, China. He leads the ONE Lab, focused on empowering machines to interact with the physical world through unified natural language interfaces (Language + X paradigm). He obtained his Ph.D. from Zhejiang University and has research visiting experience at Chinese University of Hong Kong, University of Technology Sydney, and University of Illinois Chicago. His research bridges Artificial Intelligence and Software Engineering, with core interests in: Natural Language Processing for code intelligence Large Language Model applications Multimodal learning across code, vision, and UI domains Program analysis and code generation Software engineering automation His publications demonstrate strong focus on applying transformer-based models to software engineering challenges, with recent work expanding into multimodal applications. Research spans code model security, GUI generation, data visualization, and compiler understanding, predominantly using deep learning approaches. Awards: IEEE TCSE Distinguished Paper Award for SANER 2025 publication He actively mentors students through the ONE Lab and serves on program committees for top conferences including ASE, ISSTA, and ICSE. He is seeking highly-motivated undergraduate researchers to join his team. The ONE Lab conducts cutting-edge research at the intersection of programming languages and artificial intelligence, with ongoing projects in code intelligence, multimodal learning, and LLM applications for software engineering.
Soner Onder is a Professor in the Department of Computer Science at Michigan Technological University, with an affiliated appointment in the Electrical and Computer Engineering department. His work focuses on computer architecture, programming languages, and simulation techniques, contributing significantly to processor design and memory systems research. Dr. Onder received his PhD in Computer Science from the University of Pittsburgh in 1999. His academic career has established him as a leading researcher in computer architecture with publications spanning two decades in top-tier conferences. Dr. Onder's research spans multiple areas of computer architecture and compiler design, with emphasis on processor design, memory systems, and compiler optimizations. He has made significant contributions to memory disambiguation techniques, branch prediction mechanisms, and energy-efficient processor designs. His work often bridges hardware and software domains, exploring how compiler techniques can better exploit architectural features. Recent research focuses on memory dependence prediction, recovery mechanisms for mispredictions, and energy-efficient data access patterns, with his "Future Gated Single Assignment Form" representing an innovative approach to program representation that bridges compiler design and architectural support. US Patent 7747993: Methods and systems for ordering instructions using future values (2010) Dr. Onder has advised numerous PhD students to completion, including Scott Pomerville (2024), Gorkem Asilioglu (2020), Omkar Javeri (2020), and Zhaoxiang Jin (2018). His research has been supported by grants including "Statically Controlled Asynchronous Lane Execution (SCALE)" and "Vectorized Instruction Space (VIS)" projects. He developed the FAST (Flexible Architecture Simulation Tool) for architectural research and continues to lead an active research program with publications appearing in top-tier venues through 2018. Dr. Onder leads research in computer architecture with a focus on practical implementations. His FAST simulation tool provides a flexible platform for testing architectural innovations. His work often involves collaboration with both compiler researchers and hardware designers to create holistic solutions to performance bottlenecks in modern processors, demonstrating the interdisciplinary nature of his research that bridges hardware and software concerns in computer system design.
