Find Academic Supervisors

• Formal Verification
• Software Testing
• Programming Languages
• +6 more

Alastair F. Donaldson is a Professor and Director of Research in the Department of Computing at Imperial College London, where he leads the FastPL research group. His academic career spans over a decade at Imperial, progressing from Lecturer (2011-2014) to Senior Lecturer (2014-2017), Reader (2017-2020), and Professor (2020-present). He has also held significant industry positions, including Founder and Director of GraphicsFuzz Ltd. (acquired by Google in 2018), Senior Software Engineer at Google (2018-2021), and Visiting Researcher at both Google and Microsoft Research Redmond. Donaldson earned his PhD from the University of Glasgow under Alice Miller, following a BSc (hons, First Class) in Computing Science and Mathematics. His postdoctoral work included an EPSRC Postdoctoral Research Fellowship at the University of Oxford and a Research Fellowship at Wolfson College Oxford. His research focuses on formal analysis, software testing and programming languages techniques for improving software reliability, with special emphasis on high-performance systems. Donaldson's work bridges theoretical foundations with practical applications, particularly in compiler testing, GPU programming verification, and metamorphic testing. His research has significantly influenced both academia and industry, as evidenced by the acquisition of his startup GraphicsFuzz by Google. Analysis of his recent publications reveals a strong focus on fuzz testing techniques applied across diverse domains including compilers, GPUs, cryptographic protocols, and large language models. His work consistently combines formal methods with practical testing approaches, addressing challenges in compiler correctness, memory models, and API verification across multiple platforms. 2017 BCS Roger Needham Award EPSRC Early Career Fellowship Best Paper Award, EuroSys 2024 Best Paper Award, MET 2021 Best Paper Award, IWOCL 2019 Best Paper Award, IISWC 2019 Best Paper Award, ICST 2016 ACM SIGSOFT Distinguished Paper Award, ISSTA 2023 ACM SIGSOFT Distinguished Paper Award, FSE 2017 ACM SIGPLAN Most Influential OOPSLA Paper Award, 2022 (for GPUVerify) As Director of Research in the Department of Computing, Donaldson oversees research strategy and development. His FastPL research group investigates novel techniques for programming, testing and reasoning about high performance systems. He has served on numerous program committees and held leadership roles including PLDI Steering Committee Chair (2022-2025) and PACM-PL Advisory Board member. His industry engagement includes testifying as an Expert Witness in the IBM UK Ltd v LzLabs GmbH & Ors case. The FastPL research group, which Donaldson leads, focuses on formal analysis, software testing and programming languages. The group has made significant contributions to compiler testing, GPU verification, and metamorphic testing techniques, with practical impact demonstrated by the acquisition of GraphicsFuzz. Current research directions include fuzzing for zero-knowledge proof circuits, randomized testing of decompilers, and systematic testing of large language models for code generation.

Montek SinghView profile

Associate Professor

• High-performance digital systems
• Low-power digital systems
• Asynchronous circuits
• +5 more

Montek Singh serves as an Associate Professor and Associate Chair for Academic Affairs in the Department of Computer Science at the University of North Carolina at Chapel Hill. His research focuses on high-performance and energy-efficient digital systems with particular emphasis on asynchronous and mixed-timing circuit design. Dr. Singh received his Ph.D. in Computer Science from Columbia University in 2002 and his B.Tech. in Electrical Engineering from IIT Delhi, India, in 1993. His primary research interests span high-performance and low-power digital systems, with specialization in asynchronous or clockless and mixed-timing integrated chip design. His work encompasses circuit design methodologies, CAD tools for automated synthesis, analysis and optimization techniques. He has also explored applications in energy-efficient mobile graphics hardware, secure chip design for computer security, and design challenges in emerging computing technologies. His research has practical applications in industry, with work transferred to companies including IBM, Boeing, and Handshake Solutions. Analysis of Dr. Singh's publications reveals a strong focus on asynchronous circuit design spanning two decades. His work covers fundamental pipeline architectures (MOUSETRAP), high-speed asynchronous systems, latency-insensitive design methodologies, and practical applications in graphics hardware and mobile devices. The research demonstrates consistent innovation in making asynchronous design more practical for real-world implementation while addressing performance, power efficiency, and testing challenges. His notable scientific achievements include: Best Paper Award at the 6th IEEE Intl. Symp. on Adv. Res. in Async. Circ. and Syst. (ASYNC-2000) Best Paper Finalist at the 8th IEEE Intl. Symp. on Async. Circ. and Syst. (ASYNC-02) Dr. Singh has secured significant research funding including participation in the DARPA CLASS Program (led by Boeing) in 2005, where he collaborated with Philips/Handshake Solutions to develop an industrial-strength automated synthesis flow for high-speed asynchronous systems. His research has strong industry connections and practical applications, with technology transferred to major companies including IBM and Boeing. He has also organized major academic events such as the International Symposium on Asynchronous Circuits and Systems 2009 (ASYNC 2009) at UNC Chapel Hill. Dr. Singh leads research in asynchronous systems design with connections to industry partners and practical applications. His work has been featured in prominent media outlets including The New York Times, International Herald Tribune, and Technology Review Magazine, highlighting the significance of clockless design approaches as traditional synchronous design approaches face limitations.

Vivienne SzeView profile

Professor

• Energy-Efficient Machine Learning
• Computer Vision
• Video Compression/Processing
• +7 more

Vivienne Sze is a Professor at MIT's Department of Electrical Engineering and Computer Science (EECS), part of the School of Engineering. Her research focuses on energy-efficient computing systems for machine learning, computer vision, and video compression, with applications in autonomous systems, healthcare, and IoT. She leads projects integrating algorithmic innovations with hardware design to achieve low-power solutions for embedded and mobile devices. Her work has been recognized through prestigious awards, including the Primetime Engineering Emmy Award for co-developing the HEVC video compression standard and multiple faculty awards from tech giants like Google and Qualcomm. She co-authored the book *Efficient Processing of Deep Neural Networks*, emphasizing practical hardware-software co-design strategies. Research Interests: Energy-Efficient Machine Learning Accelerators Video Coding and Compression Standards Embedded Systems and Mobile Computing Processing-in-Memory (PIM) Architectures AI for Health Monitoring and Digital Health Sustainability in AI Infrastructure Publications highlight trends in: Optimizing DNNs for edge devices Innovations in entropy coding and CABAC Memory-efficient Gaussian-based algorithms Energy-aware design for photonic computing Awards include IEEE conference best paper awards and industry recognitions for her contributions to video coding and hardware acceleration. Her lab's collaborative efforts span academia and industry, aiming to bridge theoretical research with real-world deployable systems.

Mohammed KhalidView profile

Professor

• FPGA-based Systems
• Network-on-Chip (NoC) Architectures
• Signal Processing Hardware
• +3 more

Prof. Mohammed Khalid is a Professor in the Department of Electrical and Computer Engineering at the University of Windsor. He specializes in FPGA-based systems, network-on-chip architectures, and hardware acceleration for signal processing applications. His leadership roles include serving on the executive committee of IEEE Canada. His research focuses on optimizing cryptographic hardware, automotive embedded systems, and efficient algorithm implementations on FPGAs. Key contributions include advancements in PUF-based security mechanisms, high-speed elliptic curve processors, and FPGA-accelerated machine learning algorithms. He has led projects in automotive radar systems and AUTOSAR configuration tools. His work emphasizes practical applications of hardware-software co-design principles. Research Highlights : Development of novel FPGA architectures for real-time signal processing Innovative approaches to resource-efficient cryptographic hardware Pioneering work on hybrid NoC architectures for multi-FPGA systems Awards : IEEE Windsor Section Award (2019) for group leadership Best Student Paper Award (2024) for supervised research by Mohit Sharma Prof. Khalid's 150+ publications span FPGA design methodologies, adaptive signal processing, and embedded systems security. His research group collaborates with industry partners to advance automotive electronics and IoT applications.

• Reliable Hardware Design
• Electronic Design Automation
• Edge Computing
• +4 more

Dr. Abusaleh Jabir is a University Reader at the School of Engineering, Computing and Mathematics, Oxford Brookes University. He holds a DPhil in Computing from the University of Oxford and leads the Advanced Reliable Computer Systems (ARCoS) group. His research focuses on reliable hardware design, memristive nanotechnology, edge computing, and secure authentication systems. He has over 80 peer-reviewed publications and multiple patents, including innovations in error-tolerant circuits and memristive architectures. **Education**: DPhil in Computing (University of Oxford). **Research Interests**: Reliable hardware design, electronic design automation, sensing at the edge, physical uncloneable authentication, and emerging memristor technologies. His work addresses challenges in IoT, edge computing, and cybersecurity through innovative electronic systems. **Funding & Projects**: Current projects include the Leverhulme Trust-funded MONITOR gas sensor array initiative. His research has been supported by the UK Ministry of Defence, EPSRC, and Finance South East. **Awards & Patents**: Multiple patents granted, including EU 17706875.6 (memristive logic) and GB 1914221.5 (reconfigurable memristive logic). Recognized with best paper awards. **Advising & Impact**: Supervised PhD students now leading semiconductor and automotive industries (e.g., Infineon Technologies, Continental Teves AG). Collaborates with academic and industrial partners globally. **Labs & Teams**: Leads the ARCoS group within the Artificial Intelligence, Data Analysis and Systems (AIDAS) Institute, fostering interdisciplinary innovation in secure and reliable electronics.

• Electronic Design Automation
• VLSI Design
• Computer Systems
• +7 more

Shinji Kimura is a Professor at Waseda University's Faculty of Science and Engineering, specializing in VLSI design and electronic systems. He holds a Doctor of Engineering from Kyoto University and has been with Waseda since 2002, previously serving as Associate Professor at Nara Institute of Science and Technology (1993–2002) and Assistant Professor at Kobe University (1985–1993). Kimura's research spans low-power circuit design , approximate computing , FPGA optimization , video coding (HEVC) , and hardware acceleration for AI . His work focuses on energy-efficient architectures for applications like neural networks, computer vision, and ultra-high-definition video processing. Recent publications emphasize hardware-efficient multipliers, neural network compression, and 3D-stacked memory systems. Awards include the LSI IP Design Award (2000, 1999) and the Information Processing Society of Japan Encouragement Award (1993). He leads projects on HEVC encoding/decoding, non-volatile memory optimization, and 3D integrated circuits, with VLSI implementations achieving real-time 8K video processing.

Xuan ZhangView profile

Associate Professor

• Artificial Intelligence Hardware
• Machine Vision Sensors
• Electronic Design Automation
• +3 more

Xuan Zhang serves as Associate Professor in Electrical and Computer Engineering at Northeastern University, leading the Sensory AI Lab since joining in January 2024. Her research bridges computer architecture, integrated circuits, and artificial intelligence to develop miniaturized AI systems for autonomous physical platforms. She earned her PhD in Electrical and Computer Engineering from Cornell University in 2012. Her educational background forms the foundation for her interdisciplinary work spanning hardware and software co-design. Dr. Zhang's research focuses on artificial intelligence hardware, machine vision sensors, and security for autonomous systems. She pioneers techniques for efficient in-sensor computing, analog circuit optimization via machine learning, and hardware-level privacy preservation. Her work addresses critical challenges in energy efficiency, robustness, and security for edge AI deployment, particularly in resource-constrained environments like medical devices and autonomous vehicles. Analysis of her 2023-2025 publications reveals three dominant trends: (1) hardware-accelerated privacy mechanisms for sensors, (2) machine learning-driven analog circuit design automation, and (3) energy-efficient architectures for neural network inference. These works consistently target real-world applications in healthcare, autonomous systems, and semiconductor design. Her accolades include the prestigious NSF CAREER Award (2020) and leadership in a $10 million federal semiconductor initiative. She contributes to national efforts in AI-powered chip design through the National Center for the Advancement of Semiconductor Technology. Dr. Zhang advises graduate researchers in the Sensory AI Lab, securing significant funding for projects spanning hardware security, in-sensor computing, and autonomous system assurance. Her lab collaborates with federal agencies and industry partners on cutting-edge semiconductor research. The Sensory AI Lab operates at the hardware-software interface, developing novel architectures for intelligent edge devices. Current projects include optical privacy preservation, robust analog design tools, and energy modeling frameworks for in-sensor visual computing systems.

• Computer Architecture
• Hardware Design
• Signal Processing
• +7 more

Prof. Dr.-Ing. Holger Blume serves as Vice President for Research and Transfer at Leibniz University Hannover while maintaining his academic position as Professor in the Architectures and Systems Section within the Faculty of Electrical Engineering and Computer Science. He holds multiple leadership positions including Chairperson of the Research Commission and Central Ethics Committee, Executive Board member of eNIFE (Leibniz Research Initiative for Neurosciences), and membership in both the Laboratory of Nano and Quantum Engineering and L3S Research Centre. His research interests span computer architecture, hardware design, signal processing, AI accelerators, hearing aid technology, and biomedical engineering. His work bridges theoretical computer science with practical applications in automotive systems, medical devices, and quantum engineering. Professor Blume's research demonstrates strong interdisciplinary connections between electrical engineering, computer science, and biomedical applications, with particular emphasis on hardware-oriented solutions for real-world problems. Analysis of his recent publications (2023-2025) reveals a strong focus on hardware acceleration for AI and signal processing applications, particularly in automotive radar/LiDAR systems and hearing aid technology. His work shows consistent innovation in RISC-V processor design, specialized hardware for mathematical functions, and biomedical applications of engineering principles. The research demonstrates a clear trajectory toward energy-efficient, specialized computing architectures for specific application domains. As Vice President for Research and Transfer, Professor Blume oversees significant research initiatives at Leibniz University Hannover, which hosts multiple Clusters of Excellence including PhoenixD (Photonics, Optics, and Engineering), QuantumFrontiers, and Hearing4all. The university participates in numerous collaborative research centers and junior research groups funded by DFG, BMBF, and EU programs. Professor Blume is actively involved in multiple research facilities including the Laboratory of Nano and Quantum Engineering and the L3S Research Centre. His work connects with Leibniz University's research focuses on optical technologies, quantum optics and gravitational physics, and biomedical research and technology. His leadership positions indicate strong involvement in shaping the research strategy and ethical framework of the university's scientific endeavors.

Lei WangView profile

Associate Professor

• Cyber-Physical Systems
• Aquatic Systems
• Embedded Computing with Renewable Energy
• +3 more

Lei Wang is the F. L. Castleman Associate Professor in Engineering Innovation at the University of Connecticut's School of Engineering, Department of Electrical and Computer Engineering. He holds a PhD from the University of Illinois at Urbana-Champaign (2001), an MS (1996) and BS (1992) from Tsinghua University, China. His research focuses on cyber-physical systems , embedded computing with renewable energy , and nanoscale integrated circuit design . Key areas include microbial fuel cells , memristor-based hardware security , and low-power signal processing architectures . Recent work trends involve Quantum-dot transistor applications for in-memory computing Adaptive LDPC decoder optimization Hardware security leveraging memristor properties Energy-efficient power management systems for underwater sensors Scientific recognition includes National Science Foundation CAREER Award (2010) F. L. Castleman Term Professorship in Engineering Innovation Professional roles encompass editorial and committee positions at IEEE and ACM journals. His work spans interdisciplinary domains in renewable energy integration , VLSI design , and bio-inspired computing systems .

Petteri KaskiView profile

Associate Professor

• Theoretical Computer Science
• Algorithm Design
• Exact and Parameterized Algorithms
• +5 more

Petteri Kaski is an Associate Professor at the Department of Computer Science, School of Science, Aalto University , and a member of the Helsinki Institute for Information Technology (HIIT) . His research focuses on theoretical computer science, particularly in algorithm design, exact and parameterized algorithms, algebraic algorithms, and combinatorics. Doctoral Degree in Engineering and Technology, Helsinki University of Technology (2005) Licentiate Degree in Engineering and Technology, Helsinki University of Technology (2002) Master's Degree in Engineering and Technology, Helsinki University of Technology (2001) His recent work explores tensor scaling, Johnson-Lindenstrauss transforms, Hamiltonian cycles, and computational complexity, with contributions to polynomial-time algorithms, finite field computations, and combinatorial optimization. Notable awards include the Best Paper Award at ICALP 2017 , an ERC Starting Grant (2014) , and the Kirkman Medal (2007) . He has served on scientific committees for conferences like STACS 2025 and ICALP 2024 , and collaborated with institutions such as the IT University of Copenhagen and Universität Regensburg . Key Research Areas : Theoretical Computer Science, Algorithm Design, Exact Algorithms, Algebraic Computation, Graph Theory, Combinatorics

• Approximate Computing
• Hardware Security
• Computer Architecture
• +2 more

Vishesh Mishra is a Prime Minister's Research Fellow at the Department of Computer Science and Engineering, Indian Institute of Technology Kanpur. He concurrently serves as a Visiting Research Fellow at INRIA Centre, University of Rennes, France, and an External Research Collaborator at CANDLE LAB, IIT Roorkee. His research centers on hardware security vulnerabilities in approximate computing systems, with focus areas including hardware trojan detection in approximate circuits, energy-efficient error-resilient architectures, and side-channel attack mitigation. He develops novel methodologies for securing IoT devices and blockchain implementations through circuit-level innovations and floating-point approximation techniques. Analysis of his 15 most recent publications reveals dominant themes in approximate arithmetic unit design (adders/multipliers), hardware trojan countermeasures, and floating-point resilience. His work bridges theoretical security models with practical VLSI implementations, consistently targeting energy efficiency without compromising critical functionality in error-tolerant applications. Scientific recognition includes: Prime Minister's Research Fellowship (India's premier PhD fellowship) Collège doctoral de Bretagne international mobility grant (€9600 for 6-month INRIA research) His research is supported through competitive fellowships rather than traditional grants, with no student advising roles documented. Current collaborations span IIT Kanpur's C3i Center, IIT Roorkee's CANDLE LAB, and INRIA's Rennes research unit, focusing on cross-institutional hardware security projects.

• Energy-Efficient Computing
• Hardware Acceleration
• Machine Learning
• +3 more

Dr. David Boland is a Senior Lecturer at the School of Electrical and Computer Engineering, University of Sydney. He holds an MEng and PhD from Imperial College London. His research focuses on energy-efficient hardware acceleration, particularly using FPGAs and application-specific integrated circuits (ASICs), to optimize computational efficiency in domains like machine learning and optical communications. He has contributed to projects involving custom hardware accelerators, federated learning for edge computing, and real-time signal processing. Education: MEng, Imperial College London, 2007 PhD, Imperial College London, 2012 Research Interests: Dr. Boland’s work emphasizes reducing computational overhead through customized hardware solutions. He explores techniques for minimizing unnecessary computations while maintaining accuracy, leveraging FPGA-based designs for parallelism and energy efficiency. Key areas include: Hardware acceleration for machine learning FPGA optimization for neural networks Energy-efficient algorithms for edge computing Online arithmetic and latency-accuracy trade-offs Grants & Collaborations: 2022: On-Board Federated Learning in Orbital Edge Computing (NSW Department of Industry) 2017: Fast Automated Anomaly Detection in Communication Networks (Defence Science & Technology Group) Affiliations: Member of the Net Zero Institute, collaborating on sustainable computing solutions.

Oskar MencerView profile

Professor

• Numerical methods and simulations
• Imaging
• Discretization of space, time and value
• +7 more

Oskar Mencer is a Professor in the Department of Computing at Imperial College London , where he has been a member of academic staff since 2000. He was also a Consulting Professor at Center for Computational Earth and Environmental Science , Stanford University (2009-2010). His research focuses on Multiscale Dataflow Computing , exploring the interaction of hardware and software systems through domain-specific representations, parallel programming, VLSI design, and compiler methodologies. He has contributed to fields including high-performance computing, FPGA optimization, and computational finance. Dr. Mencer's work has been recognized with a Special Award from Com.sult (2012), Imperial College Research Excellence Award (2007), and a Top EPSRC Advanced Fellowship (2001). He has received multiple best paper awards, including at ICFPT'08 and ASAP 2008, and his 2000 paper on stream architectures was recognized as historically significant in 2015. His publications demonstrate a strong emphasis on FPGA acceleration , custom architectures , and parallel processing across geophysics, finance, and neuroscience applications. Special Award for Dataflow Innovation (2012) Best Paper Award - ICFPT'08 Best Paper Award - ASAP 2008 He has served on technical committees for conferences such as FPL , DATE , and FPT , and leads the Computer Architecture Research Group (currently inactive).

Damu RadhakrishnanView profile

Associate Professor

• Low Power Digital Architectures
• High-Performance Arithmetic Circuits
• Reversible Logic
• +3 more

Damu Radhakrishnan is an Associate Professor in the Department of Computer Engineering at SUNY New Paltz. He holds a Ph.D. in Electrical Engineering from the University of Idaho, following B.Sc. and M.Tech. degrees from the University of Kerala and IIT Kanpur, India. His research focuses on low-power digital architectures, high-performance arithmetic circuits, reversible logic, and bio-medical instrumentation. He teaches courses including Introduction to Engineering Science, Digital Logic Lab, Digital Systems Design, and Senior Design Project 2. Dr. Radhakrishnan has contributed to over 20 publications since 1983, emphasizing low-power circuit design, residue arithmetic, and biomedical device development. His work spans analog-to-residue converters, fault-tolerant systems, and medical instrumentation. Key technical reports include contributions to NASA Langley Research Center and EG&G Corporation projects. His research trends reflect a sustained focus on energy-efficient digital systems, with early contributions to CMOS power optimization and later advancements in biomedical device testing. His publications demonstrate expertise in both theoretical foundations (e.g., switching theory textbooks) and applied engineering (e.g., defibrillator analyzers). Dr. Radhakrishnan maintains an active lab in Resnick Engineering Hall, where he oversees senior design projects and collaborates on interdisciplinary engineering solutions. His technical reports highlight contributions to medical simulation tools, VLSI implementation methods, and analog-digital interface design.

• Hardware Design
• VLSI Systems
• Digital Circuit Optimization
• +4 more

Rajkumar Sarma is a Research Fellow at the Department of Computer Science & Information Systems at Lero – the Research Ireland Centre for Software, University of Limerick. His work focuses on hardware design, VLSI systems, and optimization techniques for digital circuits. He specializes in areas such as low-power architectures, floating-point arithmetic, and evolutionary algorithms for automated design. His research emphasizes hardware-software co-design, reliability analysis under PVT (Process, Voltage, Temperature) variations, and efficient implementations of multiply-accumulate (MAC) units critical to digital signal processing and image processing applications. Key technical contributions include the development of the UCM algorithm for delay optimization, grammatical evolution for synthesizable HDL code generation, and novel approaches to reduce power consumption in MAC architectures. His work bridges theoretical algorithmic innovation with practical VLSI implementation challenges, addressing both performance and reliability under extreme operating conditions. Rajkumar’s publications span 2012–2025, with a strong focus on digital circuit design, including hybrid adders, low-power flip-flop implementations, and quantum gate-based reversible circuits. His research also extends to reliability analysis of electronic components like multi-layer ceramic capacitors. He has utilized advanced simulation tools such as Cadence ADE-XL for accelerated PVT analysis, demonstrating expertise in both computational modeling and hardware validation. While no specific awards or grants are listed, his extensive publication record reflects sustained engagement with cutting-edge challenges in computer architecture and VLSI systems design.