Yang Zhou is an Associate Professor in the Department of Computer Science and Software Engineering at Auburn University, part of the Samuel Ginn College of Engineering. His research focuses on big data algorithms, machine learning, data mining, and distributed computing. He has contributed to advancements in federated learning frameworks, graph mining tools, and spatial machine learning for environmental applications like flood mapping. Education includes a Ph.D. in Computer Science from Georgia Tech (2021), M.E. in Computer Application Technology from Chongqing University (2016), and B.E. in Engineering from Jiangnan University (2014). His work emphasizes scalable algorithms for large-scale systems, with tools like DirDense for dense subgraph mining and FedASMU for federated learning optimization. Recent publications explore adversarial robustness, blockchain strategies in IoT, and curriculum-based learning for large language models. He advises on interdisciplinary projects at the intersection of AI and environmental science.
Geng Yuan is an Assistant Professor at the University of Georgia's School of Computing, specializing in AI systems, energy-efficient deep learning, and hardware-software co-design. His work bridges machine learning algorithms with emerging hardware technologies like superconducting circuits and ReRAM. He holds a Ph.D. in Computer Engineering from Northeastern University (2023) and a Master's in Electrical & Computer Engineering from Syracuse University (2016). Doctor of Philosophy (Ph.D.) in Computer Engineering, Northeastern University (2023) Master of Science (M.S.) in Electrical & Computer Engineering, Syracuse University (2016) Bachelor of Science (B.S.) in Electrical Engineering, Beijing University of Technology (2014) His research focuses on optimizing deep learning systems for edge computing and mobile platforms through techniques like model compression, sparse training, and hardware-aware neural architecture search. Recent projects include adapting large language models via hybrid-grained pruning and developing ultra-low-power AQFP circuits for binary networks. Geng Yuan's publications span top venues like NeurIPS, CVPR, ICML, ICLR, ISCA, and DAC, with notable awards including a Best Paper Award at ICLR Workshop 2021, Spotlight Papers at ICLR 2023 and NeurIPS 2021, and a Design Contest 1st Place at ISLPED 2020. Best Paper Award (ICLR Workshop'21) Spotlight Paper Award (ICLR'23, NeurIPS'21) Design Contest 1st Place (ISLPED'20) Best Paper Nomination (DATE'21, ISQED'18) He actively recruits Ph.D., Master's students, and interns to his research group, focusing on advancing AI systems through interdisciplinary approaches combining machine learning, computer architecture, and electronic design automation.
James C. Hoe is Professor of Electrical and Computer Engineering at Carnegie Mellon University (College of Engineering). He is on sabbatical at MangoBoost and directs research in computer architecture, reconfigurable computing, and high-level hardware design. Education Ph.D., Electrical Engineering and Computer Science, MIT (2000) M.S., Electrical Engineering and Computer Science, MIT (1994) B.S., Electrical Engineering and Computer Science, UC Berkeley (1992) Research Interests Professor Hoe’s work spans computer architecture , reconfigurable computing , FPGA architectures , and high-level hardware synthesis . His group created the CoRAM abstraction for virtualized FPGA computing and leads efforts in power-efficient accelerators, in-network computing, and security-oriented FPGA systems. Scientific Awards IEEE Fellow (2013) Intel Outstanding Researcher Award (2021) Research Funding & Projects Intel / VMware Crossroads 3D-FPGA Academic Research Center – co-leading exploration of FPGA roles in future datacenters. DARPA BRASS program ($2.7 M, 4 years) – ensuring long-lived software systems remain robust to resource changes. Pigasus open-source IDS – world’s fastest FPGA-accelerated intrusion-detection system (100 Gb/s on one server). Labs & Teams He heads activities within the Computer Architecture Lab at Carnegie Mellon (CALCM) , supervising graduate researchers on CoRAM++, SPIRAL autotuning, and FPGA overlays for stream processing.
Affiliation & Education Scott Hauck is a Professor at the University of Washington's Department of Electrical & Computer Engineering and an Adjunct Professor in Computer Science & Engineering. He leads the Adaptive Computing Machines and Emulators (ACME) Lab . He earned his BS in EECS from UC Berkeley (1990), and MS/PhD in CSE from the University of Washington (1992/1995). Research Focus Dr. Hauck specializes in FPGA-based reconfigurable computing with applications in: Quantum Computing: FPGA controllers for trapped-ion quantum systems enabling precise laser control and quantum state readout. Medical Imaging: Portable radiation sensors for personalized cancer therapy and PET scanner enhancements. High-Energy Physics: FPGA readout systems for ATLAS pixel detectors at CERN's Large Hadron Collider. AI Acceleration: Real-time machine learning inference for scientific applications via projects like hls4ml. His work bridges hardware innovation with computational physics, emphasizing real-time processing and low-latency systems. Publication Trends Recent research focuses on FPGA-accelerated machine learning for particle physics (e.g., transformer networks for LHC trigger systems) and quantum computing instrumentation. Earlier work established foundations in reconfigurable computing architectures and medical imaging electronics. Awards & Recognition Distinguished Teaching Award, University of Washington (2010) Advising & Funding Leads the ACME Lab with extensive funding from NSF, DARPA, NIH, DOE, and industry partners including Intel, Xilinx, and Microsoft. Mentored over 30 MS/PhD students in VLSI, reconfigurable systems, and scientific computing. Collaborations & Labs Directs the ACME Lab (EE1-307), collaborating with UW Radiology (Prof. Robert Miyaoka), UW Physics (Prof. Shih-Chieh Hsu), and Drexel University (Prof. Josh Agar). Projects include quantum control systems, LHC readout electronics, and medical sensor networks.
Joy Arulraj is an Associate Professor in the School of Computer Science within the College of Computing at Georgia Institute of Technology. His research focuses on data systems, machine learning, and database systems, with a particular emphasis on video analytics and adaptive query processing. He leads the Data Systems and Analytics Group and is developing the EVA AI-Relational Data System. Dr. Arulraj's research interests span data systems, machine learning, database systems, video analytics, and adaptive query processing. His work centers on developing systems that efficiently process complex queries, particularly for video analytics and machine learning workloads. He has made significant contributions to GPU database systems, non-volatile memory database management, and adaptive query processing techniques. His research often bridges the gap between theoretical database principles and practical implementations for modern hardware architectures. His recent publications show a strong trend toward video analytics systems, adaptive query processing for machine learning workloads, and GPU-accelerated database systems. The EVA system represents a major focus of his recent work, providing end-to-end exploratory video analytics capabilities. His research also addresses fundamental database concepts like buffer management, query optimization, and storage management, adapting these principles for modern hardware and application requirements. Dr. Arulraj has advised numerous graduate students including Pramod Chunduri, Gaurav Tarkok Kakkar, Jiashen Cao, and Sayan Sinha. His graduated students have gone on to work at companies like ServiceNow, Meta Research, and the Korean Army. He actively teaches database system courses at Georgia Tech, including Database System Implementation (CS 4420/6422) and Advanced Database System Implementation (CS 4423/6423), where students build database systems from scratch using C++ and the BuzzDB framework. He maintains an active research program with consistent publication output across top database and systems conferences. His work spans from theoretical database principles to practical system implementations, with a recent emphasis on video analytics, machine learning integration with database systems, and leveraging modern hardware like GPUs and non-volatile memory for database applications.
Rashmi Vinayak is an Associate Professor in the Computer Science Department at Carnegie Mellon University, with a courtesy appointment in the Electrical and Computer Engineering Department. She is a member of both the Systems group and Theory group at CMU and leads TheSys research group. She is also affiliated with the Parallel Data Lab (PDL). Her educational background includes a Ph.D. from UC Berkeley in 2016, followed by postdoctoral studies at the same institution. Rashmi's research spans the intersection of computer/networked systems and information/coding theory. Her current focus is on robustness and resource efficiency in data systems across storage, communication, and computation. Key thrusts include storage systems, caching systems, and systems for machine learning. Her work on SIEVE, a cache eviction algorithm, has been widely adopted by industry including VMware, Google, Redpanda, and numerous open source libraries. Her recent publications demonstrate a strong trend toward practical systems research with theoretical foundations, particularly in caching algorithms, storage systems, and machine learning infrastructure. Many of her papers have received best paper awards and industry adoption. Notable awards include: Sloan Research Fellowship (2023) IEEE Information Theory Society Goldsmith Lecturer (2023) NSF CAREER Award (2020) Multiple USENIX NSDI Community (Best Paper) Awards VMware Systems Research Award (2021) Facebook and Google Research Awards Rashmi has supervised numerous PhD, Master's, and undergraduate students, many of whom have gone on to prestigious positions at Harvard, Google, Meta, and other leading institutions. Her research has been generously funded by NSF, Sloan Foundation, Open Compute Project, Google, Facebook/Meta, VMware, and Amazon Web Services. She actively collaborates with industry partners including Google, Microsoft, NetApp, Facebook, Cisco, Intel and Cloudera. She leads TheSys research group which focuses on designing next-generation data systems that are robust, efficient, and performant. The group takes a multi-disciplinary approach spanning computer systems, information theory, and machine learning.
Zhonghai Lu is a Professor of Electronic Systems Design (specializing in Dependable and Autonomous Systems) at KTH Royal Institute of Technology, part of the Department of Electrical Engineering in the School of Electrical Engineering and Computer Science (EECS). He serves as Program Director for KTH's Embedded Systems master's program and Director of Studies at the Division of Electronics and Embedded Systems. His research focuses on Network-on-Chip (NoC), computer architecture, embedded systems, and Prognostics and Health Management (PHM) of power electronics. He leads a research group exploring in-network processing and embedded intelligence, transforming passive networks into active computational frameworks. Lu holds a BSc from Beijing Normal University (1989), MSc and PhD from KTH (2002, 2007), and an MBA in Innovation and Growth from the University of Turku (2012). He has authored over 240 scientific papers, including journal articles and peer-reviewed conferences, with notable recognitions such as Best Paper Awards at NOCS’2015 and EU HiPEAC, and a Featured Paper in IEEE Transactions on Computers (2020). He serves as Associate Editor for ACM Transactions on Architecture and Code Optimization (TACO) and has chaired major conferences like HiPEAC’2017 and NOCS’2018. His research group’s recent work includes integrating AI into hardware acceleration, fault-tolerant neural networks, and RUL estimation for power electronics using recurrent neural networks. Lu has secured grants from the Swedish Research Council and Intel Corporation and developed courses like IL2230 (Hardware Architectures for Deep Learning) and IL2233 (Embedded Intelligence), pioneering embedded AI education at KTH. Education: BSc (Beijing Normal University), MSc/PhD (KTH), MBA (University of Turku) Awards: Best Paper Awards (NOCS, EU HiPEAC), Swedish Research Council Grants, Intel Research Gifts Labs/Teams: Research Group on In-Network Processing and Embedded Intelligence
Professor Knut Reinert is a leading figure in algorithmic bioinformatics at the Free University of Berlin, where he holds a professorship in the Department of Mathematics and Computer Science. He also maintains a significant affiliation with the Max Planck Institute for Molecular Genetics in Berlin, where he leads the Efficient Algorithms for Omics Data group. His research spans both institutions through the Reinert Lab, which focuses on developing novel computational approaches for biological data analysis. Reinert's educational background includes a Diploma in Computer Science (1994) and a Doctorate (Dr. Ing./Ph.D., 1999, with honors) from the Max-Planck-Institut for Computer Science and Universität des Saarlandes in Saarbrücken. Prior to his professorship, he worked as a computer scientist under Prof. Gene Myers at Celera Genomics in Rockville, USA (1999-2002). His primary research interests center on algorithmic bioinformatics with specific focus on developing novel algorithms and data structures for biomedical mass data analysis. This includes creating mathematical models for genomic sequence analysis and algorithms for mass spectrometry data to detect differential protein expression between normal and diseased samples. His work bridges the gap between computational tool development and practical biological applications, with particular emphasis on NGS and proteomics data. The publications and projects led by Prof. Reinert demonstrate a consistent focus on advancing computational methods in bioinformatics. His research spans genomic sequence analysis, RNA research (particularly long non-coding RNAs), parallel computing applications, and GPU acceleration for biological data processing. The work shows increasing sophistication in handling large-scale biological datasets through innovative algorithmic approaches. Intel® Parallel Computing Center designation for his lab CUDA Research Center status DFG funding of 530 thousand Euros for RNA research de.NBI funding of 2 million Euros BMBF funded projects 'LIVE-DREAM' and 'EssBar' Prof. Reinert leads multiple significant research projects and has established strong collaborations with international partners including Texas A&M, Kings College London, Eberhardt-Karls Universität Tübingen, Robert-Koch-Institute, and various Turkish institutions. His lab receives funding from major organizations including DFG, BMBF, and Intel. The Reinert Lab maintains active teaching responsibilities at FU Berlin, offering courses at BSc, MSc, and PhD levels using both traditional and innovative learning concepts like e-learning and inverted classrooms. The Reinert Lab consists of two interconnected research groups that work closely with experimental biologists and medical researchers to develop practical computational solutions for real-world biological problems. The lab has established itself as a key player in the German and international bioinformatics community through its development of the widely-used SeqAn library and participation in national infrastructure initiatives.
Takeshi Ikenaga is a Professor at Waseda University’s School of Fundamental Science and Engineering and Graduate School of Information, Production and Systems . He earned his Ph.D. in Information & Computer Science from Waseda University in 2001, following B.E. and M.E. degrees in Electrical Engineering (1988–1990). His career spans roles at NTT LSI Laboratories (1990–2002), Kitakyushu Foundation for Advancement of Industry, Science and Technology (FAIS) (1999–2002), and visiting researcher at the University of Massachusetts (1999–2000). Research Interests : Application-specific SoCs for video/image processing, including compression (H.264/AVC, H.265/HEVC), filters (super-resolution, noise reduction), recognition systems (feature detection, object tracking), and communication (UWB, LDPC). He also works on many-core processor design, ultra-low-delay vision systems, and sports analytics (volleyball, figure skating) with real-time 3D pose estimation and ball tracking. Awards : Recipient of the Furukawa Sansui Award (Waseda University, 1988) IEICE Research Encouragement Award (1992) Multiple Best Paper/Presentation Awards (2006–2022) at conferences including DAC/ISSCC, LSI IP Design, ISOCC, ISPACS, and CVIT APSIPA Distinguished Lecturer Certificate (2015) Waseda University Presidential Teaching Award (2020)
Dr. Hiren Patel is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. He holds a Doctorate in Computer Engineering from Virginia Tech and previously worked as a postdoctoral fellow at UC Berkeley under Edward A. Lee. His research focuses on real-time embedded systems, computer architecture, machine learning hardware, and cybersecurity. He teaches courses like ECE 150 (Programming), ECE 320/429 (Computer Architecture), and ECE 327 (Digital Systems). Research Interests: Cyber-physical systems and hybrid architectures Hardware/software co-design methodologies Predictable cache coherence protocols IoT and edge computing systems Security in embedded and real-time systems Recent work emphasizes cache coherence solutions for safety-critical systems and GPU acceleration strategies. His publications address challenges in multicore predictability, FPGA bandwidth optimization, and autonomous robotics orchestration. No specific awards are listed, though his extensive publication record indicates significant contributions to embedded systems research. He currently oversees graduate student applications focusing on his core research areas.
Eamonn Keogh is a Professor in the Computer Science and Engineering Department at the University of California, Riverside. His pioneering work centers on the Matrix Profile, a transformative approach to time series data mining enabling efficient solutions for motif discovery, anomaly detection, and similarity search. His algorithms (STAMP, STOMP, SCRIMP, DAMP, SCAMP) offer exact, parameter-free, and scalable solutions across domains like seismology, bioinformatics, and industrial IoT. Research areas include: Development of ultra-fast algorithms for time series joins and motif discovery at unprecedented scales (breaking the 100 million barrier) GPU acceleration for time series mining Domain-agnostic methods for semantic segmentation and anomaly detection Novel primitives like Time Series Chains, Snippets, and Consensus Motifs His work is highly cited and recognized by industry and academia, with applications ranging from NASA's Cassini mission to detecting BGP anomalies in computer networks.
Peter Pietzuch is a Professor in the Department of Computing at Imperial College London, where he leads the Large-Scale Data & Systems (LSDS) group. He also serves as the Director of Research and is a Visiting Researcher at Microsoft Research Cambridge. Pietzuch holds a Ph.D. from the University of Cambridge and a B.A. from Girton College. His research spans distributed systems, cloud computing, big data processing, and systems security. Key interests include: Scalable architectures for cloud-native applications Efficient stream processing and machine learning systems Trusted execution environments and secure cloud infrastructure Optimization of serverless computing and distributed databases His recent publications focus on adaptive machine learning frameworks, secure cloud resource management, and high-performance stream processing systems. Trends show strong emphasis on hardware-software co-design, confidential computing, and fault-tolerant architectures. Awards include: Best Paper Award at Middleware'03 He actively advises PhD students and secures grants for projects like Faasm (serverless computing) and Teechain (blockchain security). His LSDS group collaborates with industry partners including Microsoft Research. Pietzuch teaches undergraduate and graduate courses including Scalable Systems for the Cloud and Operating Systems . He co-founded the ACM DEBS conference and serves on steering committees for EuroSys and Middleware.
Holger Fröning is a full professor at Heidelberg University’s Institute of Computer Engineering (ZITI), where he leads the Hardware and Artificial Intelligence (HAWAII) Lab. His research focuses on embedded machine learning , high-performance computing , and hardware-software co-design , with emphasis on resource efficiency, power optimization, and emerging architectures like analog , photonic , and resistive memory systems. He has held leadership roles including Managing Director of ZITI (2023–present) and Dean of Studies for Computer Science (2019–2022) , and has collaborated with institutions such as NVIDIA Research, Chinese Academy of Sciences, and Graz University of Technology. Research Trends : His recent publications explore Bayesian neural networks , green machine learning , analog computing noise mitigation , and GPU/FPGA optimization . Articles highlight photonic computing for AI , memory-efficient training , and hardware-aware DNN compression . Scientific Awards : 2025 HiPEAC Paper Award (Nature Computational Science) 2014 Google Faculty Research Award Multiple Best Paper Awards (IPDPS, ICPP, ECML-PKDD workshops) Leadership & Service : Organized workshops (WEML, ITEM, F4HD), chaired tracks at EuroPar and ISC, and served on program committees for ICPR, ECAI, and FPL. Education & Affiliations : PhD and MSc from University of Mannheim (2007/2001). Sponsors include DFG, FWF, FFG, NVIDIA, SAP, and XILINX.
Paolo Ienne is a Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL), where he leads the Processor Architecture Laboratory (LAP) within the School of Computer and Communication Sciences. His research focuses on advancing reconfigurable computing systems through innovative FPGA architectures and high-level synthesis methodologies. His primary research domains include reconfigurable computing, FPGA architecture design, dynamically scheduled dataflow circuits, and hardware acceleration techniques. Recent work emphasizes memory system optimization for FPGAs, formal verification of circuit transformations, and rapid C-to-hardware compilation flows. He has pioneered approaches for handling thousands of outstanding memory misses in FPGA accelerators and developed novel techniques for switch-block exploration without explicit pattern enumeration. Analysis of his 2023-2025 publications reveals a strong trend toward practical FPGA deployment challenges, with increasing focus on HBM integration, virtual memory systems for PCIe-attached devices, and formally verified circuit transformations. His work consistently targets real-world bottlenecks in high-level synthesis toolchains while maintaining theoretical rigor in dataflow architecture design. Professor Ienne's laboratory receives support from the Swiss National Science Foundation and industry partners including Huawei, enabling cutting-edge research in FPGA-based acceleration. His collaborative network spans major semiconductor companies and academic institutions worldwide, with frequent co-authorship on conference proceedings and journal publications in IEEE and ACM venues.
Chita R. Das is a Professor at Pennsylvania State University, known for extensive contributions in computer architecture, machine learning, and high-performance computing. Their research focuses on optimizing hardware-software co-design for edge computing, cloud infrastructure, and energy-efficient systems. Key areas include FPGA acceleration, GPU optimization, and serverless computing frameworks. Das collaborates frequently with institutions like AMD and Intel, addressing challenges in parallel computing and distributed systems. Their work bridges theoretical advancements with practical applications in recommendation systems, bioinformatics, and real-time video processing. Research interests span across hardware acceleration techniques, cloud resource management, and sustainable computing. Notable projects include adaptive training frameworks for intermittent power environments and neural-augmented game streaming for mobile platforms. Das's publications often address performance bottlenecks in modern architectures and propose novel solutions for latency and energy efficiency. Recent articles highlight innovations in serverless computing cost optimization, low-bandwidth VR streaming, and FPGA-based bioinformatics tools. Their contributions are characterized by interdisciplinary approaches combining computer architecture with machine learning and embedded systems.
