Aristides Efthymiou is an Assistant Professor at the Department of Computer Engineering and Informatics, University of Ioannina. He holds a PhD from the University of Manchester (2002) and has held academic positions at the University of Edinburgh (2004–2011) and research roles at the Institute of Microelectronics, National Center for Scientific Research 'Demokritos,' and Integrated Systems Development SA. His research focuses on microarchitecture, digital systems design, and VLSI circuits. Education: Bachelor's and postgraduate diploma in Computer Science, University of Crete (1993–1995) PhD in Computer Science, University of Manchester (2002) Research interests include approximate computing, visible light communications (VLC), and energy-efficient circuit design. He is a member of the VLSI Systems and Computer Architecture Laboratory (VCAS), contributing to projects like the Artemis Program on supply chain traceability. His work spans over 25 international publications, emphasizing hardware optimization and signal processing in VLC systems. Awards: None explicitly mentioned. Lab and Team: Leads the VCAS lab, collaborating with faculty members like Professors George Tsiatouchas and Chrysovalantis Kavousianos. Supervises doctoral candidates in areas like approximate multipliers and VLC systems.
Louise Helen Crockett is a Senior Lecturer in the Department of Electronic and Electrical Engineering at the University of Strathclyde, Faculty of Engineering. She completed both her undergraduate and postgraduate studies at the same institution and has been a member of the academic staff since 2007, progressing from Research Fellow to Senior Lecturer in 2025. She is an active member of the Strathclyde Software Defined Radio (StrathSDR) research group, where she leads a team of researchers and PhD students, and contributes to multiple industry-facing research projects. Her educational background includes a Doctor of Philosophy (PhD) in Code Division Multiple Access Applied to SpeckNets and a Master of Engineering (MEng) in Electronic & Electrical Engineering with Business Studies (with distinction), both from the University of Strathclyde. Louise's research is centered on the hardware implementation of Digital Signal Processing (DSP) systems for wireless communications, with a focus on Field Programmable Gate Arrays (FPGAs), System on Chip (SoC) devices, and AMD/Xilinx RFSoC technologies. She also works on design methodologies and tools for FPGA-based systems. Her teaching encompasses Hardware Description Language (HDL) design, Simulink-based workflows, and FPGA programming, with an emphasis on practical industry-relevant skills. She has co-authored several books, including Software Defined Radio with Zynq UltraScale+ RFSoC (2023), and develops training materials for broader academic and professional use. Her recent publications reflect a strong trend in FPGA-accelerated signal processing, 5G/6G physical layer implementation, RFSoC applications, and machine learning for modulation classification. These works demonstrate a consistent focus on bridging theoretical algorithms with real-world hardware deployment, particularly in advanced wireless systems and spectrum utilization. She has received the Best Student Paper Award on 29 May 2018. This award was shared with her advisees, highlighting her role in mentoring high-impact research. Louise supervises final-year undergraduate, MSc, and PhD students, and is actively involved in research projects funded by EPSRC, including the Industrial CASE Account and initiatives on spectrum sharing for 5G/6G. She also leads professional training activities, such as short courses on RFSoC and PYNQ, further extending her impact beyond the university. She leads a research team within the StrathSDR group, which focuses on SDR, FPGA-based DSP, and next-generation wireless systems. Her team collaborates on open innovation platforms and contributes datasets and codebases to support reproducible research.
Dr. Zhiru Zhang is a Professor in the School of Electrical and Computer Engineering at Cornell University and a member of the Computer Systems Laboratory. His research focuses on new algorithms, methodologies, and design automation tools for heterogeneous computing systems, with recent publications centering on high-level synthesis (HLS), hardware specialization for machine learning, and programming models for software-defined FPGAs. Dr. Zhang earned his Ph.D. in Computer Science from UCLA, where he co-founded AutoESL based on his dissertation research on HLS. AutoESL was acquired by Xilinx (now AMD), and its HLS tool evolved into Vivado HLS (now Vitis HLS), which is widely used for designing FPGA-based hardware accelerators. He also holds a B.S. in Computer Science from Peking University and an M.S. in Computer Science from UCLA. Dr. Zhang's research interests span hardware design, high-level synthesis, FPGA acceleration, machine learning acceleration, heterogeneous computing systems, and computer architecture. His work bridges the gap between software algorithms and hardware implementation, focusing on creating efficient design automation tools that enable specialized hardware for emerging applications, particularly in AI and machine learning. His recent publications demonstrate strong trends in differentiable programming for hardware design, sparse computation optimization, and efficient implementation of large language models on FPGAs. Dr. Zhang has received numerous prestigious awards including being named an IEEE Fellow, the Intel Outstanding Researcher Award, AWS AI Amazon Research Award, Facebook Research Award, Google Faculty Research Award, DAC Under-40 Innovators Award, Rising Professional Achievement Award from UCLA, DARPA Young Faculty Award, IEEE CEDA Ernest S. Kuh Early Career Award, and NSF CAREER Award. His papers have won multiple Best Paper Awards from top conferences including ASPLOS (2025), ISPD (2025), FPGA (2024, 2022, 2021, 2019), AutoML (2024), FCCM (2018), ACM TODAES (2012), and Top Picks in Hardware and Embedded Security (2020). His papers on HLS scheduling and application-specific instruction-set processor (ASIP) compilation have been inducted into the ACM/SIGDA TCFPGA Hall of Fame for the classes of 2022 and 2023, respectively. On the teaching side, Dr. Zhang has received the Ruth and Joel Spira Award for Excellence in Teaching (2018) and twice the Michael Tien'72 Excellence in Teaching Award (2016, 2022), the highest recognition for teaching in the College of Engineering. He teaches courses including ECE 5775/6775: High-Level Digital Design Automation, ENGRD/ECE 2300: Digital Logic and Computer Organization, ECE 6980: Special Topics on Hardware Acceleration of Deep Learning, ENGRG 1050: Freshman Engineering Seminar, and ECE 5950: Special Topics on High-Level Digital Design Automation. Dr. Zhang leads an active research group with numerous PhD students and postdocs. His current students include Jordan Dotzel, Jie Liu, Zichao Yue, Yixiao Du, Yaohui Cai, Andrew Butt, Hongzheng Chen, Jiajie Li, Niansong Zhang, Matthew Hofmann, Zhanqiu Hu, Vesal Bakhtazad, and Grace Dinh. His alumni have gone on to successful careers at companies like NVIDIA, Google, AWS AI, Meta, Microsoft, and academic positions at universities including University of Illinois Chicago and Zhejiang University. The group has received multiple research grants from industry partners including AWS, Intel, and Google.
Dr. Marcin Ziembicki serves as an Assistant Professor at the Institute of Radioelectronics and Multimedia Technology within the Faculty of Electronics and Information Technology at Warsaw University of Technology. His research integrates experimental particle physics with advanced detector development, focusing on neutrino interactions and nuclear phenomena through major international collaborations. His primary research interests include: Neutrino oscillation physics and cross-section measurements Development of photomultiplier-based detection systems for water Cherenkov experiments Analysis of hadronic final states in deep-inelastic scattering Spin-dependent asymmetries in polarized targets Real-time FPGA-based data acquisition systems Recent publications demonstrate concentrated activity in T2K and Hyper-Kamiokande neutrino experiments, with significant contributions to oscillation parameter measurements, neutron capture studies in oxygen targets, and detector calibration techniques. His work spans theoretical modeling and hands-on hardware implementation, particularly in FPGA-based readout systems for particle detectors. With 168 publications and an h-index of 49 (Scopus), his experimental work has advanced precision measurements in neutrino physics. He has supervised 7 promoted theses and participated in 14 research projects, including the T2K Near Detector upgrade and Hyper-Kamiokande photosensor development. Dr. Ziembicki maintains active roles in the COMPASS spin physics collaboration and the AMBER experiment, where he develops specialized electronics for hadron spectroscopy. His technical expertise bridges particle physics with electrical engineering, particularly in signal processing and detector electronics design for high-radiation environments.
Tina Hudson is a Professor of Electrical and Computer Engineering at Rose-Hulman Institute of Technology , specializing in analog/digital systems, electronic device modeling, and engineering education. With a Ph.D. from Georgia Institute of Technology (2000), she focuses on curriculum innovation, critical thinking pedagogy, and industry collaboration. Education : Ph.D. (2000), MSEE (1995), BEE (1992) from Georgia Tech; BS in Engineering from Berry College (1992). Research Interests span test and product engineering for analog/mixed-signal circuits, behavioral analysis in analog circuit education, and integrated circuits emulating neural systems. Her work emphasizes industrial partnerships and pedagogical research. Publication Trends include engineering education methodologies (2014-2008), industry-driven curriculum design (2009), and analog/digital hybrid systems (2009-2006). Key subfields: pedagogical innovation, industrial testing, neural emulation, and hysteresis control. Scientific Awards : Dean’s Outstanding Teacher Award (2014). Teaching & Industry Engagement : Develops curricula for test engineering, conducts workshops for pedagogical research, and collaborates with Teradyne, Micron, and Texas Instruments to enhance student internships and lab resources.
Matthias Schmelz is a researcher at the Leibniz Institute of Photonic Technology, working in the Quantum Circuits group under the Research Department Quantum Systems. His work focuses on the development of superconducting quantum circuits and cryogenic electronics, with a particular emphasis on Josephson junction fabrication, SQUID-based readout systems, and wafer-scale integration for scalable quantum technologies. Key research contributions include the design of adiabatic quantum flux parametrons (AQFP), development of high-inductance cryogenic current comparators (CCC), and optimization of microwave SQUID multiplexer (µMUX) architectures for terahertz security cameras. His projects involve collaborations with institutions like CERN and GSI Darmstadt, addressing challenges in millikelvin thermalization, noise reduction, and quantum device characterization. Recent publications highlight advancements in cross-type Josephson junction fabrication, controllable mode coupling in coplanar waveguides, and hybrid NbN-Al quantum technologies. These works span journals including Physical Review B and IEEE Transactions on Applied Superconductivity , with applications in quantum computing, particle beam diagnostics, and high-sensitivity optical sensor readouts.
Mladen Knežić is an Associate Professor at the Faculty of Electrical Engineering, University of Banja Luka. He actively contributes to research in Power Electronics , Industrial Networking , and Embedded Systems with a focus on renewable energy and real-time communication protocols. Current Role: Associate Professor (since 2023) Key Collaborations: Partnerships with IEEE, international conferences, and institutions in Serbia and Germany His research emphasizes boost converter optimization , EtherCAT/Ethernet Powerlink protocols , and TSN (Time-Sensitive Networking) . Recent projects include "Sistem automatske regulacije i kontrole navodnjavanja" (2023-2024) and "Implementacija FTT paradigme u TSN standarda" (2019-2020). Key publication trends include energy efficiency in power electronics, deterministic networking solutions, and FPGA-based system designs. He has contributed to over 15 peer-reviewed articles and conference papers between 2006-2022. He collaborates with researchers such as Željko Ivanović and Branko Dokić , and has participated in projects funded by the Ministry of Science and Technology of Republika Srpska and the Ministry of Agriculture, Forestry, and Water Management (total funding exceeding 50,000 BAM). As co-author of the textbook Mikrokontroleri: arhitektura i projektovanje (2022), he contributes to academic education in microcontroller systems. His ORCID is 0000-0003-3240-9110 .
Ian Grout serves as Associate Professor in the Department of Electronic and Computer Engineering within the Faculty of Science and Engineering at the University of Limerick, Ireland, and is affiliated with the Optical Fibre Sensors Research Centre. His academic career spans over 25 years with continuous research output since 1994, focusing on hardware design and engineering education methodologies. His educational background includes: Ph.D. in Electronic Engineering from Lancaster University (awarded 1994) B.Eng. in Electronic Engineering from Lancaster University (awarded 1991) Dr. Grout's research integrates Mixed-Signal Integrated Circuit Design, Test Technology Education, and Sensor System Design using FPGAs with innovative educational approaches. His work bridges theoretical hardware development and practical implementation, particularly in remote laboratory experimentation and mechatronics systems. The fingerprint analysis of his 152 publications reveals dominant expertise in Field Programmable Gate Arrays (100%), Computer Hardware (61%), and Application Specific Integrated Circuit design (61%), with significant contributions to Teaching and Learning methodologies (56%). Recent publications (2023-2024) demonstrate a clear trajectory toward optimizing hardware testability for emerging architectures like processing-in-memory cores while advancing educational tools for embedded systems programming. His work shows increasing integration of machine learning concepts with traditional circuit design and a sustained focus on practical educational implementations through European collaborations like the Erasmus+ DIG-SENSING program. Professional engagements include active membership in the Institution of Engineering and Technology (IET), International Microelectronics and Packaging Society (IMAPS), and service on the UK EPSRC Peer Review College. He previously chaired the Educational ECAD User Group (EEUG) from 2001-2002 and maintained committee membership until 2005. At the University of Limerick, Dr. Grout contributes to the Optical Fibre Sensors Research Centre where his FPGA-based sensor system designs support advancements in optical sensing technologies. His current work involves developing remote laboratory frameworks for electrical engineering education while maintaining active research in integrated circuit test methodologies.
Dr. Theo Markettos is a Senior Research Associate at the Department of Computer Science and Technology, University of Cambridge. His research focuses on computer architecture, security, and systems & networking, with notable contributions to the CHERI capability system and FPGA-based hardware prototyping. He teaches the ECAD and Architecture Practical Classes (Part IB) for undergraduate students. His work spans secure hardware-software interfaces, memory protection mechanisms, and parallel computing architectures. He has contributed to projects like Bluehive (a FPGA-based neural network simulator) and CHERI, which enhances system security through compartmentalization and capability-based protections. Recent publications address heterogeneous accelerators, dynamic scalarization for GPGPUs, and termination detection in message-passing architectures. Markettos has collaborated extensively with researchers from academia and industry on topics such as FPGA cluster interconnect design, DMA vulnerability analysis (Thunderclap), and FPGA-based SoC prototyping. His teaching emphasizes hands-on exploration of full-stack computer design using FPGAs. He is based at the William Gates Building in Cambridge and leads efforts in secure computing systems through hardware innovation and interdisciplinary collaboration.
Professor Philip Leong is a faculty member at the University of Sydney's School of Electrical & Information Engineering, serving as Director of the Computer Engineering Laboratory. He holds a B.Sc., B.E., and Ph.D. from the University of Sydney. His academic career spans roles at institutions like the Chinese University of Hong Kong and industry collaborations with companies like ST Microelectronics and CruxML Pty Ltd. Research Interests: Leong specializes in FPGA-based solutions for high-performance computing, financial systems, medical monitoring (e.g., Parkinson's disease), and environmental forecasting. He pioneers applications in edge-based machine learning, low-latency systems, and hardware-software co-design. Key Projects : Radio Frequency Machine Learning Edge-based Training of Deep Neural Networks using FPGAs Awards : 2005 FPT Best Paper Award 2007 & 2008 FPL Outstanding Paper Awards Teaching: He instructs courses in embedded systems, computer architecture, and digital logic (e.g., ELEC3607, ELEC5741). His lab focuses on custom hardware and parallel software to address real-world challenges like financial risk modeling and climate prediction. Labs/Teams: Leads the Computer Engineering Lab, affiliated with The Net Zero Institute, Sydney Nano Institute, and the Charles Perkins Centre.
David López Vilariño is a Lecturer at the University of Santiago de Compostela, affiliated with the Department of Electronics. His research focuses on LiDAR data processing, FPGA acceleration for high-performance computing (HPC), and embedded systems. He teaches courses such as Fundaments of Electronic Instrumentation , Heterogenous Programming , and The Physics of Computing , contributing to bachelor’s and master’s programs in Physics, Informatics Engineering, and High Performance Computing. His research interests span LiDAR-based applications in urban planning, infrastructure monitoring, and medical imaging. He has developed algorithms for LiDAR data analysis, FPGA-based motion estimation, and GPU-accelerated medical image processing. Notable contributions include tools like the Open Lidar Visualizer and Analyser for 3D point cloud visualization. Dr. Vilariño’s work bridges computer architecture, signal processing, and geomatics. His recent publications emphasize optimizing HPC workloads using FPGAs and Intel OneAPI, as well as automated LiDAR-based detection of power lines, road points, and pedestrian zones. He collaborates on interdisciplinary projects involving parallel computing, embedded vision systems, and real-time surveillance applications. Teaching responsibilities include coordinating courses for the Máster Universitario en Computación de Altas Prestaciones, a joint program with the University of A Coruña. No academic awards are listed, but his active role in teaching and research grants underscores his contributions to the field.
Enrique Ostúa Arangüena is an Associate Professor in the Department of Electronic Technology at the University of Seville. He is part of the Digital Research and Development group and has been involved in numerous research projects focused on microelectronics, embedded systems, and FPGA-based solutions. His work includes contributions to IoT security, real-time systems, and hardware-oriented file systems. He has led or participated in projects such as USECHIP (Microelectronics Chair), Advanced Initiation Systems for IoT, and Hardware Vorbis CODEC development. His research spans digital circuit design, low-power electronics, and FPGA implementation, with emphasis on applications like time synchronization (SNTP), cryptographic hardware (E-LUKS), and embedded system optimization. He has authored chapters in books such as Grid Computing and Program of Teaching Teams for the Training of Novice Teachers , and has presented at conferences like the IBERCHIP Workshop and IEEE Symposium on Industrial Embedded Systems. Key contributions include patents on trigonometric function calculators and hardware security modules. He has collaborated extensively with researchers like David Guerrero Martos and Julián Viejo Cortés, focusing on methodologies for teaching digital electronics and FPGA-based SOC design. His work emphasizes open-source technologies, hardware-software co-design, and practical applications in industrial control systems.
Ahmed Gomaa Radwan is a Professor at Cairo University's Department of Engineering Mathematics and Physics, Egypt. His research spans fractional-order systems , chaotic dynamics , FPGA implementations , and bio-impedance modeling , with numerous publications in IEEE Access, Microelectronics Journal, and Circuits Systems Signal Processing. Key collaborators include Lobna A. Said , Wafaa S. Sayed , and Ahmed Soltan . His work emphasizes chaos-based encryption , fractional calculus , and hardware accelerators for real-world applications. Publications highlight trends in fractional-order chaotic systems , memristor technology , and secure image processing , often involving CNTFET designs and nonlinear resonators .
Craig Ramsay is a Research Associate in the School of Mathematical & Computer Sciences at Heriot-Watt University, specializing in Computer Science. His work focuses on bridging functional programming languages with hardware implementation, particularly targeting performance improvements through direct hardware solutions. His research interests span several interconnected domains within computer science: Functional Programming Languages, particularly Haskell Hardware implementation of programming language features Field Programmable Gate Array (FPGA) design and optimization Graph reduction techniques for functional languages Garbage collection systems for concurrent hardware environments Performance optimization of functional language implementations Dr. Ramsay's recent publications demonstrate a consistent focus on implementing functional programming concepts directly in hardware. His work spans from low-level garbage collection mechanisms to high-performance graph reduction systems, all targeting improved execution efficiency for non-strict functional languages. A notable pattern in his research is the practical application of theoretical functional programming concepts to real-world hardware constraints. Craig Ramsay actively collaborates with researchers including Robert Stewart and Hans-Wolfgang Loidl, producing both academic publications and associated datasets that are publicly available. His work has garnered attention in academic circles with citations and downloads indicating impact in the functional programming and hardware design communities.
Robert James Stewart is an Associate Professor in the School of Mathematical & Computer Sciences at Heriot-Watt University, specializing in Computer Science. His research focuses on hardware processor architectures for functional programming languages and FPGA-based systems, including projects like the EPSRC HAFLANG initiative. He designs energy-efficient FPGA processors for Haskell and explores neural network compression, scalable parallelism, and high-level DSLs for FPGAs. He has authored over 40 publications, including work on Heron (graph reduction hardware), Cloaca (concurrent garbage collection), and educational tools integrating Canvas/GitLab. He actively participates in editorial activities for ACM and collaborates on security-aware coding initiatives. Stewart has supervised numerous datasets and is open to PhD students since 2013.
