Find Academic Supervisors

• Security Engineering
• Hardware Security
• Post-Quantum Cryptography
• +4 more

Prof. Tim Güneysu is a full Professor and Head of the Security Engineering department at the Faculty of Computer Science, Ruhr-Universität Bochum. He serves as Vice Dean for Strategy and Finances (since 2023) and previously as Speaker of the Horst-Görtz Institute for IT-Security (2020-2023). His academic journey includes roles as Associate Professor at the University of Bremen (2015-2017) and Assistant Professor at Ruhr-Universität Bochum (2011-2015). He also holds positions at the German Research Center for Artificial Intelligence (DFKI) and has conducted postdoctoral research at UMass Amherst. His research focuses on Security-by-Design principles, CAD for Security, and countermeasures against physical attacks. He emphasizes efficient cryptographic implementations and system-level hardware security. Key areas include post-quantum cryptography, side-channel resistant designs, and secure embedded systems. He has contributed over 200 publications in top venues, with recent work on FPGA-based cryptographic accelerators, secure hardware extensions (e.g., KeyVisor), and post-quantum algorithms for IoT. His research themes include agile signature acceleration, fault attack mitigation, and hardware-software co-design for security. Notable projects include CONVOLVE (edge-AI security) and QuantumRISC (quantum-safe systems). His work bridges theoretical cryptography with practical hardware implementations, emphasizing real-world security applications.

Gary GrewalView profile

Associate Professor

• Computer-Aided Design (CAD) Tools
• Field Programmable Gate Arrays (FPGAs)
• Machine Learning
• +5 more

Gary Grewal is an Associate Professor at the School of Computer Science , University of Guelph. His research focuses on developing intelligent Computer-Aided Design (CAD) tools for Field Programmable Gate Arrays (FPGAs) , integrating classical optimization techniques with machine learning and deep learning to address challenges in placement and routing for heterogeneous devices. He has received the Michal Servit Award (2017, 2018) for outstanding FPGA research and the University of Guelph Faculty Association Distinguished Professor Award for Excellence in Teaching (2017) . Grewal has held NSERC Discovery Grants annually from 1999 to 2023. Co-founder of the Guelph FPGA CAD Group Key collaborator with institutions like Ryerson University , University of Toronto , and University of British Columbia His work extends to health technology through the IronTracker mobile app , developed with Andrew Hamilton-Wright and students (A. D'Angelo, J. Carter, F. Liu, R. Pattison) to manage Hereditary Hemochromatosis (HHC) . The app, available in four languages and adopted in 100+ countries, was recognized at Parliament Hill and the Ontario Legislature. Scientific Awards : Michal Servit Award (2018) Michal Servit Award (2017) Distinguished Professor Award for Teaching (2017) NSERC Discovery Grants (1999-2023) His recent publications highlight trends in machine learning for FPGA CAD , including reinforcement learning for partitioning, deep learning for congestion estimation, and adaptive algorithms for placement. Grewal remains active in teaching courses like Discrete Optimization (CIS*6070) and Digital Systems I (CIS*3120).

• Channel decoders
• Circuits for communications
• Cryptography
• +8 more

Guido Masera is a Full Professor at the Department of Electronics and Telecommunications (DET) at the Polytechnic University of Turin, where he has been actively involved in teaching and research for over two decades. He serves as a Member of the Board of Directors, Member of the GEDI Observatory for Gender Equality, Diversity and Inclusion, and Member of the Permanent University Observatory for monitoring the academic supply chain. His research interests span across channel decoders, circuits for communications, cryptography, deep learning, digital integrated circuits, field programmable gate arrays (FPGA), and hardware design. His work focuses on VLSI architectures for image and video coding, digital architectures for error correcting codes, application specific approximate computing, VLSI architectures for machine learning, digital architectures for bio-inspired processing, digital architectures for post-quantum cryptography, bio-inspired electronics for robotics and biomedical applications, RISC-V extensions and hardware accelerators, and circuit architectures for efficient machine learning and artificial intelligence. His recent publications (2025) demonstrate a strong focus on RISC-V architecture, particularly in the context of cryptographic implementations, hardware security, and post-quantum cryptography. His research group VLSILAB is actively engaged in cutting-edge research in hardware security, efficient processor design, and specialized computing architectures. Among his notable recognitions are the Premio Francesco Carassa awarded by the Telecommunications and Information Technologies Group Association (gtti) in 2010, and his recognition as a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) since 2007. He also serves as an Associate Editor for several prestigious journals including ELECTRONICS (2019-present), IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS (2015-2019), and IET CIRCUITS, DEVICES & SYSTEMS (2013-2016). Professor Masera has advised numerous PhD students working on advanced topics in VLSI design, post-quantum cryptography, hardware accelerators, and machine learning implementations. His current research projects include ISOLDE (2023-2026) and TRISTAN (2022-2025), both EU-funded projects focused on RISC-V technology and domain-specific ecosystems. He leads the VLSILAB research group at the Department of Electronics and Telecommunications, which focuses on cutting-edge research in VLSI architectures, hardware security, and specialized computing systems. The group collaborates with industry partners and participates in major European research initiatives.

• Unmanned Aerial Vehicles (UAVs)
• Field Programmable Gate Arrays (FPGAs)
• Computational Fluid Dynamics
• +6 more

Ramazan Yeniçeri is a Lecturer at Istanbul Technical University's Department of Aeronautical Engineering. His research focuses on Unmanned Aerial Vehicles (UAVs), Field Programmable Gate Arrays (FPGAs), and computational fluid dynamics, with applications in hardware acceleration and autonomous flight systems. Academic Rank: Lecturer University: Istanbul Technical University Department: Aeronautical Engineering Research Interests: Yeniçeri's work bridges aerospace engineering and computer science, emphasizing: FPGA-based hardware acceleration for aerospace systems UAV communication networks (FANETs) and formation flight Dynamical modeling for 6-DoF systems Autopilot software and real-time operating systems Scientific Awards: He has received the BOEING Academic Work Encouragement Award (2017) and the Best Doctoral Thesis Award (2015) . Project Leadership: As Principal Investigator (PI), he leads projects like: "IHA Kayıt, Takip, Kontrol ve Hava Trafik Yönetim Sistemi" (2024–2025) "FPGA Tabanlı 6DoF Dinamik Hızlandırıcı Tasarımı" (2024) "EU Sürü İHA" (2020–2022) His recent publications highlight trends in UAV communication, FPGA acceleration, and multi-sensor tracking.

Uwe Meyer-BaeseView profile

Associate Professor

• Digital Signal Processing
• FPGA Design
• VLSI Systems
• +4 more

Uwe Meyer-Baese is an Associate Professor in the Electrical and Computer Engineering Department at the FAMU-FSU College of Engineering. He holds a Ph.D. (Dr.-Ing. habil) from Darmstadt University of Technology, Germany. His research focuses on Digital Signal Processing with FPGAs, VLSI design, and medical imaging applications. He has authored over 100 publications, 5 books, and holds 3 patents. He has been recognized with awards such as the Humboldt Fellowship (2009) and the FAMU-FSU Teaching Award (2007). Education History: Dr.-Ing. habil (Venia Legendi), Darmstadt University of Technology, Germany, 2003 Ph.D. (Dr. Ing.), Darmstadt University of Technology, Germany, 1995 M.S., Darmstadt University of Technology, Germany, 1989 Research Interests: FPGA-based embedded systems and real-time DSP Low-power VLSI architectures Medical image processing (e.g., breast MRI, brain tumor analysis) Hardware security and intellectual property protection Graph theory applications in biological networks Recent work includes advancements in FPGA implementations for microprocessor systems, brain network controllability studies, and AI-driven medical diagnostics. His lab focuses on bridging hardware design with biomedical applications, emphasizing practical implementations through FPGA platforms. Awards: Max-Kade Award in Neuroengineering (1997) ECE Department Research Award (2005) Humboldt Fellowship (2009) FAMU-FSU Teaching Award (2007) He has advised over 60 master’s theses and contributed to major grants in FPGA-based medical systems. His book Digital Signal Processing with Field Programmable Gate Arrays is a widely used textbook in the field.

Milica OrlandicView profile

Associate Professor

• Hyperspectral Imaging
• Remote Sensing
• Digital Design
• +7 more

Milica Orlandic is an Associate Professor in the Department of Electronic Systems at NTNU. She holds an MSc from the University of Montenegro (2009) and a PhD from NTNU (2015). Her research focuses on hyperspectral imaging, remote sensing, FPGA-based systems, and embedded computing for aerospace applications. She is actively involved in the HYPSO CubeSat mission, developing onboard processing systems for Earth observation. Education: MSc in Electrical Engineering, University of Montenegro (2009) PhD in Electronics, NTNU (2015) Research Interests: Her work spans hyperspectral data processing , including compression, anomaly detection, and onboard computing for satellites. She also explores reconfigurable hardware (FPGAs) for real-time signal processing, cyber-physical systems, and spaceborne sensor systems. Publications Trends: Recent work emphasizes lightweight machine learning for anomaly detection, FPGA acceleration of hyperspectral compression (CCSDS 123), and algorithm co-design for CubeSat missions. Key contributions include robust onboard processing frameworks for HYPSO-1 and adaptive hardware-software systems. Advising & Teams: She supervises a dynamic team of over 40 PhD and MSc students working on FPGA implementations, satellite systems, and hyperspectral algorithms. Notable collaborations include the HYPSO CubeSat project, which aims to deliver high-resolution Earth observation data with low latency. Labs & Infrastructure: Her research leverages NTNU’s facilities for embedded systems prototyping, FPGA development, and CubeSat payload testing. The HYPSO mission integrates her team’s hardware-software co-design innovations for space applications.

Heiner GiefersView profile

Professor

• Cloud Computing
• Hardware Acceleration
• Field-Programmable Gate Arrays
• +7 more

Heiner Giefers is a Professor for Cloud Computing at the Department of Computer Science and Natural Sciences at Southwestphalia University of Applied Sciences since 2018. Prior to this position, he worked as a Research Staff Member at IBM Research - Zürich (2013-2018), focusing on hardware acceleration in cloud environments, implementation of big data algorithms on FPGAs, and development of hardware platforms for approximate and in-memory computing. Dr. Giefers received his doctorate (Dr. rer. nat.) from Universität Paderborn in 2012 with a dissertation titled "Design and Programming of Reconfigurable Mesh based Many-Cores." His academic journey at Universität Paderborn includes serving as an Academic Council Member (Akademischer Rat a.Z.) from 2008-2013 and as a Scientific Staff Member from 2006-2012, where he taught digital technology and computer architecture. Professor Giefers' research focuses on energy-efficient computing, particularly through hardware acceleration using FPGAs for cloud and AI workloads. His work spans cloud computing infrastructure, hardware-software co-design, approximate computing, in-memory computing, and energy-efficient implementations of machine learning algorithms. He has made significant contributions to the field of reconfigurable hardware for high-performance computing applications. His recent publications show a strong trend toward applying hardware acceleration techniques to artificial intelligence and machine learning workloads, with a particular focus on energy efficiency. His work bridges the gap between theoretical computer science and practical hardware implementation, often resulting in patented technologies that address real-world computing challenges in cloud environments. Best Paper Award for "Stochastic Matrix-Function Estimators: Scalable Big-Data Kernels with High Performance" (2016) Best Paper Award Nomination for "Energy-Efficient Stochastic Matrix Function Estimator for Graph Analytics on FPGA" (2016) Best Paper Award Nomination for "Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system" (2014) Best Paper Award Nomination for "A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier" (2010) Professor Giefers actively supervises numerous Bachelor's and Master's students, with over 50 completed theses covering topics from machine learning and cloud computing to IoT systems and hardware acceleration. He leads the "Energy-efficient AI" project (eki), which aims to increase the energy efficiency of AI systems through approximation techniques for FPGA implementation. Additionally, he collaborates with Prof. Dr. Christian Plessl on the "Digital teaching materials with Jupyter Notebooks" project, creating interactive learning materials that integrate teaching content, program code, and results into a single document. His work extends to practical applications through multiple patents related to FPGA implementations, neural networks, and memory systems, demonstrating his commitment to translating research into real-world solutions.

Dejan MarkovicView profile

Professor

• Implantable neuromodulation systems
• Domain-specific compute architectures
• Design methodologies
• +3 more

Dejan Markovic is a Professor of Electrical and Computer Engineering at the University of California, Los Angeles (UCLA), holding the Mukund Padmanabhan Term Chair in Electrical Engineering and serving as Area Director for Circuits and Embedded Systems. His research spans implantable neuromodulation systems, domain-specific compute architectures, and energy-efficient design methodologies for biomedical and embedded applications. Dr. Markovic earned his PhD (2006) and MS (2000) from UC Berkeley and BS (1998) from the University of Belgrade, Serbia. His research focuses on ultra-low-power integrated circuits for neural interfaces, including artifact-free stimulation/sensing platforms and neural recording front-ends, alongside domain-specific architectures for sparse linear algebra in IoT and mobile computing. Recent work demonstrates strong trends in medical neuromodulation and energy-efficient VLSI for biomedical signal processing and wireless communications. His scientific contributions have been recognized with prestigious awards including IEEE Fellow (2021), ISSCC Lewis Award (2014), ISSCC Jack Raper Award (2010), and NSF CAREER Award (2009). Additional honors include UC Berkeley's David J. Sakrison Memorial Prize (2007) and multiple best paper awards. Dr. Markovic co-founded semiconductor IP startup Flex Logix Technologies (2014) and leads the DMGroup research lab at UCLA. He teaches core courses including ECE 115C (Digital Integrated Circuits), ECE M216A (VLSI Design), and BME M260 (Neuroengineering), mentoring students in cutting-edge VLSI design for medical and communication applications. The DMGroup lab specializes in developing implantable neuromodulation systems, domain-specific compute engines, and novel design methodologies, with recent projects featured in UCLA's coverage of brain-computer interface technology and Anari AI's $2M funding for personalized AI hardware.

Antonio PlazaView profile

Professor

• Hyperspectral Image Analysis
• Remote Sensing
• High-Performance Computing
• +4 more

Antonio Plaza is a Full Professor at the University of Extremadura, Spain, and Head of the Hyperspectral Computing Laboratory. With over 600 publications, he is a leading expert in hyperspectral data processing and parallel computing of remote sensing data. He serves as IEEE Fellow and has received numerous accolades, including the 2019 Excellent Teaching Award and multiple Highly Cited Researcher recognitions. Research Interests : His work bridges Hyperspectral Image Analysis , Medical Imaging , and High-Performance Computing . Recent projects focus on 3D anatomical modeling, AI-driven surgical tools, and deep learning applications for aortic dissection segmentation. Scientific Awards : 2019 Highly Cited Researcher (Geosciences) 2015 IEEE Fellow 2019 Excellent Teaching Award 2018 Highly Cited Researcher (Cross-Field) 2002 Best PhD Dissertation, University of Extremadura Editorial Leadership : Served as Editor-in-Chief of IEEE Transactions on Geoscience and Remote Sensing (2013–2017) and held multiple committee roles in IEEE GRSS. His articles reflect a shift from remote sensing to medical imaging, with a focus on Aortic Dissection Segmentation , Skull Reconstruction , and AI-driven Medical Tools .

Nicholas WrightView profile

Researcher

• High Performance Computing (HPC)
• Computer Architecture
• Performance Analysis
• +5 more

Nicholas Wright serves as the NERSC Chief Architect and Advanced Technologies Group Lead at Lawrence Berkeley National Laboratory's National Energy Research Scientific Computing Center (NERSC) since 2009. He holds a PhD in Chemistry from the University of Durham, United Kingdom. Role: Focuses on evaluating emerging technologies for scientific computing Key Contributions: Chief architect for NERSC-10 procurement (2026), optimized Perlmutter machine architecture His research explores performance analysis of HPC applications and architectural evaluation for future technologies. Recent publications address: GPU frequency optimization using DNN-based models FPGA acceleration for HPC workloads Quantum computing cost scaling Disaggregated memory system evaluation Scientific workflow characterization Scientific awards include: Co-investigator on SDCI HPC Improvement grant (2007-2012) His work bridges computer architecture and energy-efficient computing through rigorous performance modeling and technology evaluation for NERSC's diverse scientific users.

William D. BishopView profile

Associate Professor

• Engineering Education
• Configurable Computing
• Parallel and Distributed Systems
• +5 more

William D. Bishop is the Director of Admissions for the Faculty of Engineering at the University of Waterloo and an Associate Professor, Teaching Stream in the Department of Electrical and Computer Engineering. He leads the Engineering Admissions Team and teaches courses in engineering design, digital design, and embedded systems. His research focuses on engineering education, configurable computing, and multimedia processing. Education: Ph.D. in Electrical and Computer Engineering (2003), University of Waterloo M.A.Sc. in Electrical Engineering (1996), University of Waterloo B.A.Sc. in Computer Engineering/Management Science (1994), University of Waterloo Research Interests: Engineering education methodologies and outcomes Field-programmable gate arrays (FPGAs) for general-purpose computing Image processing and multimedia system optimization Hardware/software co-design for embedded systems Awards: Unsung Hero Award (2024) James A. Field Teaching Excellence Award (2006, 2011) Ontario Volunteer Service Award (2019) Teaching & Service: Teaches ECE 124, ECE 224, and ECE 327 Oversees admissions for all undergraduate engineering programs Professional memberships: PEO, OSPE, CEEA, IEEE Industrial Experience: Co-op at Atlantis Aerospace (1992-1993): Developed flight simulation engines Co-op at Motorola Corporation (1991-1992): Ported software to OS/2 platform

• Electronic Design Automation (EDA)
• Computer Architecture
• Embedded Systems
• +5 more

Prof. Wolfgang Ecker is a Professor at the Technical University of Munich (TUM), affiliated with the Chair of Design Automation within the TUM School of Computation, Information and Technology . His research focuses on Electronic Design Automation (EDA), RISC-V processor architectures, and hardware-software co-design. He leads projects advancing EDA tools for embedded systems, neural network acceleration, and formal verification methodologies. Ecker's work bridges machine learning techniques with traditional EDA challenges, addressing topics like energy-efficient AI inference and automated documentation generation. His contributions span compiler optimization, FPGA implementations, and fault analysis in digital systems. Recent research highlights include contributions to the TRISTAN project for RISC-V ecosystem development, model-driven architecture frameworks, and AI-driven timing analysis. He actively collaborates on open-source EDA tools and explores Rust-based embedded systems development. Ecker’s lab emphasizes practical applications in edge computing and automotive microcontroller safety, with a strong emphasis on interdisciplinary collaboration across TUM’s CIT School. His publications (15 most recent listed) reflect a focus on EDA tool innovation, processor design, and leveraging machine learning for hardware optimization. While no specific awards are mentioned, his involvement in ERC-funded projects and leadership in international collaborations underscores his academic impact.

Vaughn BetzView profile

Professor

• Field-Programmable Gate Arrays (FPGAs)
• Computer-Aided Design (CAD)
• Hardware Acceleration
• +4 more

Vaughn Betz is a Professor in the Department of Electrical and Computer Engineering at the University of Toronto, Faculty of Applied Science and Engineering. He is also a Distinguished Visiting Professor at Cerebras Systems and Faculty Affiliate at the Vector Institute for Artificial Intelligence. His research focuses on creating efficient programmable hardware (FPGAs), computer-aided design (CAD) programs to optimize hardware systems, and hardware accelerators for compute-intensive applications like deep learning. He developed the widely used VPR FPGA CAD flow and co-founded Right Track CAD, acquired by Intel/Altera. Education BSc in Electrical Engineering, University of Manitoba (1991) M.S. in Electrical and Computer Engineering, University of Illinois at Urbana–Champaign (1993) PhD in Electrical and Computer Engineering, University of Toronto (1998) Research Focus Betz's research spans FPGA architecture innovation, CAD tool development, and hardware acceleration methods. Key areas include: Creating FPGA architectures optimized for deep learning inference Developing datacenter-friendly FPGAs with embedded NoCs Mapping deep learning applications to programmable hardware CAD tools for FPGA debugging and context switching Hardware acceleration for medical applications like photodynamic cancer therapy Awards and Honors Fellow of IEEE, NAI, and Engineering Institute of Canada Professional Engineers of Ontario Medal for Engineering Excellence (2016) 13 best/most significant paper awards NSERC/Intel Industrial Research Chair in Programmable Silicon Google Faculty Research Award (2020) Multiple teaching awards including Gordon R. Slemon Award (2016) Research Leadership Betz leads the Verilog-to-Routing (VTR) project and co-directs the Intel/Vmware Crossroads 3D FPGA Academic Research Centre. His research is sponsored by NSERC, Intel, Google, AMD, IBM, and others.

Yves BlaquièreView profile

Professor

• Microelectronics
• VLSI and ASIC Design
• FPGA-Based Systems
• +6 more

Yves Blaquière is a Professor in the Department of Electrical Engineering at École de Technologie Supérieure. He is affiliated with the Communications and Microelectronic Integration Laboratory (LaCIME), focusing on microelectronics, integrated circuit design, and power integrity in advanced electronic systems. His research spans VLSI/ASIC design, FPGA-based reconfigurable computing, MEMS for avionics, and radiation effects on electronics. Aeronautics and Aerospace Intelligent and Autonomous Systems Microelectronics and VLSI Power Integrity Modeling MEMS Switch Design Radiation-Resilient Circuits His recent publications highlight innovations in GHz-range power integrity for SiP, FPGA-based SHEPWM inverters, and MEMS switches for avionic power systems. Collaborations with researchers like Frédéric Nabki and Nicolas Constantin reflect his focus on industrial applications and technology transfer. Professor Blaquière co-supervises PhD candidates including Hachem Bensalem, Gabriel Nobert, and Abdurrashid Hassan Shuaibu, covering topics such as heterogeneous optimization, power converter modeling, and MEMS switch development. His work contributes to wafer-scale prototyping platforms like WaferBoard and advanced tools for radiation testing in FPGAs. LaCIME, under his involvement, emphasizes equity, diversity, and inclusion, offering students opportunities to engage in cutting-edge projects from materials to communication protocols. The lab's expertise includes micro/nanofabrication, photonic microsystems, and signal processing.

Andy YeView profile

Associate Professor

• Field-programmable gate array (FPGA) architectures
• Computer-Aided Design (CAD) tools for FPGAs
• Logic synthesis
• +5 more

Dr. Andy Ye is an Associate Professor in the Department of Electrical, Computer, and Biomedical Engineering at Ryerson University, where he conducts research and teaches courses in advanced digital systems. Education : PhD (2004), MASc (1999), and BASc (1996) from the University of Toronto Research Interests focus on: Field-programmable gate array (FPGA) architectures Computer-Aided Design (CAD) tools for FPGAs and VLSI Logic synthesis and hardware implementation Digital communication algorithms and computer vision systems Publication Trends demonstrate expertise in FPGA area modeling, motion estimation architectures, and VLSI design optimization across multiple IEEE and ACM venues. Scientific Achievements : Best Paper Award (2016) at International Conference on Field Programmable Logic and Applications Teaching Contributions include graduate-level FPGA design (EE 8219), low-power digital circuits (ELE 734), and fundamental network theory (ELE 302). He maintains active supervision availability for students.