Ronan Farrell is a Professor in the Department of Electronic Engineering at Maynooth University’s Faculty of Science & Engineering and currently serves as Vice President Academic and Registrar. He earned a BE and PhD from University College Dublin (1993, 1998) and previously worked at ICI/Zeneca Chemicals (1993–1995) and Parthus Technologies (1998–2001) as a mixed-signal ASIC designer. His academic career at Maynooth spans from Lecturer to Professor (2016), with leadership roles as Head of Department (2012–2019) and Director of the Callan Institute (2008–2015). He leads SFI research initiatives in radio frequency electronics and sensor networks. Education: BE (1993), PhD (1998) – University College Dublin Leadership: Head of Electronic Engineering (2012–2019), Director of Callan Institute (2008–2015) Research Focus: Wireless system design, RF/mixed-signal electronics, technology transfer, and innovation. His work bridges theoretical advancements (e.g., MIMO capacity optimization) with practical applications (e.g., 5G transmitters, digital predistortion techniques). Publication Trends: Recent articles emphasize 5G wireless systems, power amplifier linearization, OFDM signal processing, and behavioral modeling. Collaborations span institutions in Ireland, Europe, and Asia, with a focus on hardware implementation and system optimization. Students & Collaborations: Mentions co-authors in publications but no explicit student list provided. Collaborates with researchers in Ireland, Germany, and China.
Steven Wilton is a Professor in the Department of Electrical & Computer Engineering at the University of British Columbia , where he also serves as Department Head (2019–2023, reappointed in 2024). He holds a BASc from the University of Victoria , and MASc and PhD from the University of Toronto . Education BASc (Victoria) MASc (Toronto) PhD (Toronto) His research focuses on Field-Programmable Gate Arrays (FPGAs) and Computer-Aided Design (CAD) algorithms . He explores FPGA architectures, post-silicon debugging, and programmable logic for System-on-a-Chip (SoC) design , aiming to enhance FPGA efficiency and accessibility for small/medium electronics companies. As part of the UBC SoC Research Group and ICICS , he contributes to advanced computing systems. He is also a Professional Engineer (BC) and IEEE Fellow , recognized for his work in electrical and computer engineering. Scientific Awards IEEE Fellow Dr. Wilton supervises graduate students like Andrew David Gunter (PhD in Electrical and Computer Engineering) and teaches courses including ELEC 402 , CPEN 311 , and CPEN 513 . His affiliations include the Institute for Computing, Information and Cognitive Systems (ICICS) and the Quantum Computing Research Cluster .
Dr. Miron Kłosowski serves as an Assistant Professor at the Department of Microelectronic Systems within the Faculty of Electronics Telecommunications and Informatics at Gdańsk University of Technology. His primary workplace is located in Building A of the Faculty, room 309, where he conducts research and teaching activities in microelectronic systems and image sensor technologies. Dr. Kłosowski obtained his "dr inż." (Doctor of Engineering) degree on January 23, 2001, in the field of Electronics (Technology) from the Faculty of Electronics Telecommunications and Informatics. His academic journey has focused on the intersection of analog circuit design and digital image processing. His research program centers on advanced microelectronic systems with particular emphasis on image sensors and analog-to-digital conversion architectures. Dr. Kłosowski's work bridges theoretical circuit design with practical applications in imaging technology through: CMOS image sensor architecture and optimization for reduced noise Innovative analog-to-digital converters with embedded processing capabilities Low-power circuit design techniques for sensor interfaces Digital correction methods for image sensor non-uniformities Field-programmable gate array implementations for real-time signal processing Massively parallel imaging array architectures Analysis of Dr. Kłosowski's publication record (2017-2024) reveals a consistent research trajectory toward more integrated, efficient solutions for digital pixel sensors. His most recent work demonstrates significant advancements in on-the-ramp processing techniques that enable simultaneous image acquisition and filtering. The research spans both theoretical circuit innovations and practical implementations with applications in biomedical imaging and general-purpose camera technology. His educational contributions include adapting hardware teaching methodologies to remote environments during the pandemic, as documented in his IEEE Transactions on Education publication. Dr. Kłosowski maintains an extensive teaching portfolio across multiple engineering disciplines, regularly instructing courses in programmable circuits, FPGA applications, and digital signal processing. His teaching responsibilities span undergraduate and graduate programs in Electronics and Telecommunications, Informatics, and Biomedical Engineering, with consistent course offerings through the 2024/25 academic year. He participates in research initiatives including the HAPADS project (Highly Accurate and Autonomous Programmable Platform for Providing Air Pollution Data Services to Drivers and Public), which is funded through Norwegian and EEA funds under the Applied Research Program. This project is realized through the Department of Microelectronic Systems under agreement NOR/POLNOR/HAPADS/0049/2019-00.
Mario Roberto Casu is an Associate Professor in the Department of Electronics and Telecommunications (DET) at the Polytechnic University of Turin, where he also serves as a contact person for the Degree Course in Electronic Engineering. He is a member of the Interdepartmental Center SmartData@PoliTO - Big Data and Data Science Laboratory and actively contributes to the VLSILAB research group. Dr. Casu received his laurea degree summa cum laude in electronics engineering and his Ph.D. in electronics and communications engineering from the Polytechnic University of Turin in 1998 and 2001, respectively. He has held visiting researcher positions at Columbia University (2010-2011), National University of Singapore (2017), and CEA Grenoble (2001), as well as a visiting professorship at Chongqing Technology and Business University (2016). His research spans several interconnected domains focused on hardware implementation of advanced computing systems. Dr. Casu's work primarily addresses Embedded Machine Learning through heterogeneous embedded systems (ASICs, FPGAs, CPUs, GPUs), System-on-Chip design including latency-insensitive approaches and Network-on-Chip architectures, Microwave Imaging for both biomedical (breast cancer and stroke detection) and industrial applications (food contamination detection), and Ultra-Wide Band technologies for biomedical applications. His research bridges theoretical design methodologies with practical industrial applications across biomedical, automotive, and food sectors. Dr. Casu's recent scholarly output demonstrates a clear trajectory toward optimizing hardware implementations for machine learning workloads, particularly through FPGA-based solutions and precision-scalable multipliers. His work increasingly integrates microwave sensing technologies with machine learning for specialized applications like food contaminant detection, while maintaining strong foundations in traditional VLSI design and system-level optimization techniques. As an academic leader, Dr. Casu serves on the editorial board of IEEE TRANSACTIONS ON AGRIFOOD ELECTRONICS and regularly participates in program committees for major international conferences including DATE, ICCAD, DAC, and VLSI-SoC. He has been involved in 9 national academic research projects (2 as principal investigator), 2 European academic research projects, and 7 national and international industrial projects (2 as principal investigator). Dr. Casu actively mentors the next generation of engineers, currently supervising multiple PhD students including Lorenzo Lagostina, Edward Manca, Teodoro Urso, Fabrizio Ottati, and Luca Urbinati. His teaching portfolio includes courses such as Integrated Systems Technology, Microelectronics Digital Design, and Embedded Electronic Systems for AI/ML across both bachelor's and master's programs in Electronic and Computer Engineering. His laboratory work centers around the VLSILAB Group at DET, where his team develops innovative solutions in hardware acceleration for machine learning, microwave imaging systems, and system-level design methodologies. Current projects include the EU-funded GreenChips-EDU initiative for sustainable microelectronics education and industry collaborations with companies like Infineon Technologies on coarse-grained reconfigurable array architectures for machine learning applications.
Yuriy V. Pershin is a Professor in the Department of Physics and Astronomy at the McCausland College of Arts and Sciences, University of South Carolina. His research focuses on emerging memory devices (e.g., memristors, memcapacitors), unconventional computing paradigms, and 2D materials like graphene. He leads experimental and theoretical investigations into device fabrication, nonlinear dynamics, and nanoscale phenomena. Research Interests: Emerging Memory Devices: Designing memristive systems with memory retention capabilities, modeling their electrical behavior, and exploring their applications in low-power circuits. Unconventional Computing: Developing computing architectures that integrate memory and logic (e.g., neuromorphic networks), demonstrated through FPGA implementations and memristive neural networks. 2D Materials: Studying graphene kinks and antikinks as nanoscale motion carriers, with applications in nanoelectromechanical systems (NEMS). Key contributions include defining rigorous tests for ideal memristors, optimizing Joule-loss reduction in memristive systems, and proposing hardware implementations of memcomputing. His work bridges fundamental physics with applied engineering, leveraging tools like SPICE modeling and molecular dynamics simulations. Publications emphasize theoretical rigor and experimental validation, often addressing controversies in memristor characterization. Notable themes include noise-induced chaos in memcomputing, synchronization in memristive networks, and graphene-based electromechanical systems. Awards and Grants: No specific awards listed, though his work reflects sustained research funding in nanotechnology and device physics. Collaborations span academia and industry, focusing on practical applications of novel materials and circuits. Labs/Teams: His laboratory focuses on interdisciplinary projects at the intersection of physics, electronics, and materials science, with ongoing efforts in device fabrication, circuit emulation, and theoretical modeling.
Aristides Efthymiou is an Assistant Professor at the Department of Computer Engineering and Informatics, University of Ioannina. He holds a PhD from the University of Manchester (2002) and has held academic positions at the University of Edinburgh (2004–2011) and research roles at the Institute of Microelectronics, National Center for Scientific Research 'Demokritos,' and Integrated Systems Development SA. His research focuses on microarchitecture, digital systems design, and VLSI circuits. Education: Bachelor's and postgraduate diploma in Computer Science, University of Crete (1993–1995) PhD in Computer Science, University of Manchester (2002) Research interests include approximate computing, visible light communications (VLC), and energy-efficient circuit design. He is a member of the VLSI Systems and Computer Architecture Laboratory (VCAS), contributing to projects like the Artemis Program on supply chain traceability. His work spans over 25 international publications, emphasizing hardware optimization and signal processing in VLC systems. Awards: None explicitly mentioned. Lab and Team: Leads the VCAS lab, collaborating with faculty members like Professors George Tsiatouchas and Chrysovalantis Kavousianos. Supervises doctoral candidates in areas like approximate multipliers and VLC systems.
Dr. Zhiru Zhang is a Professor in the School of Electrical and Computer Engineering at Cornell University and a member of the Computer Systems Laboratory. His research focuses on new algorithms, methodologies, and design automation tools for heterogeneous computing systems, with recent publications centering on high-level synthesis (HLS), hardware specialization for machine learning, and programming models for software-defined FPGAs. Dr. Zhang earned his Ph.D. in Computer Science from UCLA, where he co-founded AutoESL based on his dissertation research on HLS. AutoESL was acquired by Xilinx (now AMD), and its HLS tool evolved into Vivado HLS (now Vitis HLS), which is widely used for designing FPGA-based hardware accelerators. He also holds a B.S. in Computer Science from Peking University and an M.S. in Computer Science from UCLA. Dr. Zhang's research interests span hardware design, high-level synthesis, FPGA acceleration, machine learning acceleration, heterogeneous computing systems, and computer architecture. His work bridges the gap between software algorithms and hardware implementation, focusing on creating efficient design automation tools that enable specialized hardware for emerging applications, particularly in AI and machine learning. His recent publications demonstrate strong trends in differentiable programming for hardware design, sparse computation optimization, and efficient implementation of large language models on FPGAs. Dr. Zhang has received numerous prestigious awards including being named an IEEE Fellow, the Intel Outstanding Researcher Award, AWS AI Amazon Research Award, Facebook Research Award, Google Faculty Research Award, DAC Under-40 Innovators Award, Rising Professional Achievement Award from UCLA, DARPA Young Faculty Award, IEEE CEDA Ernest S. Kuh Early Career Award, and NSF CAREER Award. His papers have won multiple Best Paper Awards from top conferences including ASPLOS (2025), ISPD (2025), FPGA (2024, 2022, 2021, 2019), AutoML (2024), FCCM (2018), ACM TODAES (2012), and Top Picks in Hardware and Embedded Security (2020). His papers on HLS scheduling and application-specific instruction-set processor (ASIP) compilation have been inducted into the ACM/SIGDA TCFPGA Hall of Fame for the classes of 2022 and 2023, respectively. On the teaching side, Dr. Zhang has received the Ruth and Joel Spira Award for Excellence in Teaching (2018) and twice the Michael Tien'72 Excellence in Teaching Award (2016, 2022), the highest recognition for teaching in the College of Engineering. He teaches courses including ECE 5775/6775: High-Level Digital Design Automation, ENGRD/ECE 2300: Digital Logic and Computer Organization, ECE 6980: Special Topics on Hardware Acceleration of Deep Learning, ENGRG 1050: Freshman Engineering Seminar, and ECE 5950: Special Topics on High-Level Digital Design Automation. Dr. Zhang leads an active research group with numerous PhD students and postdocs. His current students include Jordan Dotzel, Jie Liu, Zichao Yue, Yixiao Du, Yaohui Cai, Andrew Butt, Hongzheng Chen, Jiajie Li, Niansong Zhang, Matthew Hofmann, Zhanqiu Hu, Vesal Bakhtazad, and Grace Dinh. His alumni have gone on to successful careers at companies like NVIDIA, Google, AWS AI, Meta, Microsoft, and academic positions at universities including University of Illinois Chicago and Zhejiang University. The group has received multiple research grants from industry partners including AWS, Intel, and Google.
Tina Hudson is a Professor of Electrical and Computer Engineering at Rose-Hulman Institute of Technology , specializing in analog/digital systems, electronic device modeling, and engineering education. With a Ph.D. from Georgia Institute of Technology (2000), she focuses on curriculum innovation, critical thinking pedagogy, and industry collaboration. Education : Ph.D. (2000), MSEE (1995), BEE (1992) from Georgia Tech; BS in Engineering from Berry College (1992). Research Interests span test and product engineering for analog/mixed-signal circuits, behavioral analysis in analog circuit education, and integrated circuits emulating neural systems. Her work emphasizes industrial partnerships and pedagogical research. Publication Trends include engineering education methodologies (2014-2008), industry-driven curriculum design (2009), and analog/digital hybrid systems (2009-2006). Key subfields: pedagogical innovation, industrial testing, neural emulation, and hysteresis control. Scientific Awards : Dean’s Outstanding Teacher Award (2014). Teaching & Industry Engagement : Develops curricula for test engineering, conducts workshops for pedagogical research, and collaborates with Teradyne, Micron, and Texas Instruments to enhance student internships and lab resources.
Matthias Schmelz is a researcher at the Leibniz Institute of Photonic Technology, working in the Quantum Circuits group under the Research Department Quantum Systems. His work focuses on the development of superconducting quantum circuits and cryogenic electronics, with a particular emphasis on Josephson junction fabrication, SQUID-based readout systems, and wafer-scale integration for scalable quantum technologies. Key research contributions include the design of adiabatic quantum flux parametrons (AQFP), development of high-inductance cryogenic current comparators (CCC), and optimization of microwave SQUID multiplexer (µMUX) architectures for terahertz security cameras. His projects involve collaborations with institutions like CERN and GSI Darmstadt, addressing challenges in millikelvin thermalization, noise reduction, and quantum device characterization. Recent publications highlight advancements in cross-type Josephson junction fabrication, controllable mode coupling in coplanar waveguides, and hybrid NbN-Al quantum technologies. These works span journals including Physical Review B and IEEE Transactions on Applied Superconductivity , with applications in quantum computing, particle beam diagnostics, and high-sensitivity optical sensor readouts.
Mladen Knežić is an Associate Professor at the Faculty of Electrical Engineering, University of Banja Luka. He actively contributes to research in Power Electronics , Industrial Networking , and Embedded Systems with a focus on renewable energy and real-time communication protocols. Current Role: Associate Professor (since 2023) Key Collaborations: Partnerships with IEEE, international conferences, and institutions in Serbia and Germany His research emphasizes boost converter optimization , EtherCAT/Ethernet Powerlink protocols , and TSN (Time-Sensitive Networking) . Recent projects include "Sistem automatske regulacije i kontrole navodnjavanja" (2023-2024) and "Implementacija FTT paradigme u TSN standarda" (2019-2020). Key publication trends include energy efficiency in power electronics, deterministic networking solutions, and FPGA-based system designs. He has contributed to over 15 peer-reviewed articles and conference papers between 2006-2022. He collaborates with researchers such as Željko Ivanović and Branko Dokić , and has participated in projects funded by the Ministry of Science and Technology of Republika Srpska and the Ministry of Agriculture, Forestry, and Water Management (total funding exceeding 50,000 BAM). As co-author of the textbook Mikrokontroleri: arhitektura i projektovanje (2022), he contributes to academic education in microcontroller systems. His ORCID is 0000-0003-3240-9110 .
Ian Grout serves as Associate Professor in the Department of Electronic and Computer Engineering within the Faculty of Science and Engineering at the University of Limerick, Ireland, and is affiliated with the Optical Fibre Sensors Research Centre. His academic career spans over 25 years with continuous research output since 1994, focusing on hardware design and engineering education methodologies. His educational background includes: Ph.D. in Electronic Engineering from Lancaster University (awarded 1994) B.Eng. in Electronic Engineering from Lancaster University (awarded 1991) Dr. Grout's research integrates Mixed-Signal Integrated Circuit Design, Test Technology Education, and Sensor System Design using FPGAs with innovative educational approaches. His work bridges theoretical hardware development and practical implementation, particularly in remote laboratory experimentation and mechatronics systems. The fingerprint analysis of his 152 publications reveals dominant expertise in Field Programmable Gate Arrays (100%), Computer Hardware (61%), and Application Specific Integrated Circuit design (61%), with significant contributions to Teaching and Learning methodologies (56%). Recent publications (2023-2024) demonstrate a clear trajectory toward optimizing hardware testability for emerging architectures like processing-in-memory cores while advancing educational tools for embedded systems programming. His work shows increasing integration of machine learning concepts with traditional circuit design and a sustained focus on practical educational implementations through European collaborations like the Erasmus+ DIG-SENSING program. Professional engagements include active membership in the Institution of Engineering and Technology (IET), International Microelectronics and Packaging Society (IMAPS), and service on the UK EPSRC Peer Review College. He previously chaired the Educational ECAD User Group (EEUG) from 2001-2002 and maintained committee membership until 2005. At the University of Limerick, Dr. Grout contributes to the Optical Fibre Sensors Research Centre where his FPGA-based sensor system designs support advancements in optical sensing technologies. His current work involves developing remote laboratory frameworks for electrical engineering education while maintaining active research in integrated circuit test methodologies.
Dr. Theo Markettos is a Senior Research Associate at the Department of Computer Science and Technology, University of Cambridge. His research focuses on computer architecture, security, and systems & networking, with notable contributions to the CHERI capability system and FPGA-based hardware prototyping. He teaches the ECAD and Architecture Practical Classes (Part IB) for undergraduate students. His work spans secure hardware-software interfaces, memory protection mechanisms, and parallel computing architectures. He has contributed to projects like Bluehive (a FPGA-based neural network simulator) and CHERI, which enhances system security through compartmentalization and capability-based protections. Recent publications address heterogeneous accelerators, dynamic scalarization for GPGPUs, and termination detection in message-passing architectures. Markettos has collaborated extensively with researchers from academia and industry on topics such as FPGA cluster interconnect design, DMA vulnerability analysis (Thunderclap), and FPGA-based SoC prototyping. His teaching emphasizes hands-on exploration of full-stack computer design using FPGAs. He is based at the William Gates Building in Cambridge and leads efforts in secure computing systems through hardware innovation and interdisciplinary collaboration.
Professor Philip Leong is a faculty member at the University of Sydney's School of Electrical & Information Engineering, serving as Director of the Computer Engineering Laboratory. He holds a B.Sc., B.E., and Ph.D. from the University of Sydney. His academic career spans roles at institutions like the Chinese University of Hong Kong and industry collaborations with companies like ST Microelectronics and CruxML Pty Ltd. Research Interests: Leong specializes in FPGA-based solutions for high-performance computing, financial systems, medical monitoring (e.g., Parkinson's disease), and environmental forecasting. He pioneers applications in edge-based machine learning, low-latency systems, and hardware-software co-design. Key Projects : Radio Frequency Machine Learning Edge-based Training of Deep Neural Networks using FPGAs Awards : 2005 FPT Best Paper Award 2007 & 2008 FPL Outstanding Paper Awards Teaching: He instructs courses in embedded systems, computer architecture, and digital logic (e.g., ELEC3607, ELEC5741). His lab focuses on custom hardware and parallel software to address real-world challenges like financial risk modeling and climate prediction. Labs/Teams: Leads the Computer Engineering Lab, affiliated with The Net Zero Institute, Sydney Nano Institute, and the Charles Perkins Centre.
David López Vilariño is a Lecturer at the University of Santiago de Compostela, affiliated with the Department of Electronics. His research focuses on LiDAR data processing, FPGA acceleration for high-performance computing (HPC), and embedded systems. He teaches courses such as Fundaments of Electronic Instrumentation , Heterogenous Programming , and The Physics of Computing , contributing to bachelor’s and master’s programs in Physics, Informatics Engineering, and High Performance Computing. His research interests span LiDAR-based applications in urban planning, infrastructure monitoring, and medical imaging. He has developed algorithms for LiDAR data analysis, FPGA-based motion estimation, and GPU-accelerated medical image processing. Notable contributions include tools like the Open Lidar Visualizer and Analyser for 3D point cloud visualization. Dr. Vilariño’s work bridges computer architecture, signal processing, and geomatics. His recent publications emphasize optimizing HPC workloads using FPGAs and Intel OneAPI, as well as automated LiDAR-based detection of power lines, road points, and pedestrian zones. He collaborates on interdisciplinary projects involving parallel computing, embedded vision systems, and real-time surveillance applications. Teaching responsibilities include coordinating courses for the Máster Universitario en Computación de Altas Prestaciones, a joint program with the University of A Coruña. No academic awards are listed, but his active role in teaching and research grants underscores his contributions to the field.
Enrique Ostúa Arangüena is an Associate Professor in the Department of Electronic Technology at the University of Seville. He is part of the Digital Research and Development group and has been involved in numerous research projects focused on microelectronics, embedded systems, and FPGA-based solutions. His work includes contributions to IoT security, real-time systems, and hardware-oriented file systems. He has led or participated in projects such as USECHIP (Microelectronics Chair), Advanced Initiation Systems for IoT, and Hardware Vorbis CODEC development. His research spans digital circuit design, low-power electronics, and FPGA implementation, with emphasis on applications like time synchronization (SNTP), cryptographic hardware (E-LUKS), and embedded system optimization. He has authored chapters in books such as Grid Computing and Program of Teaching Teams for the Training of Novice Teachers , and has presented at conferences like the IBERCHIP Workshop and IEEE Symposium on Industrial Embedded Systems. Key contributions include patents on trigonometric function calculators and hardware security modules. He has collaborated extensively with researchers like David Guerrero Martos and Julián Viejo Cortés, focusing on methodologies for teaching digital electronics and FPGA-based SOC design. His work emphasizes open-source technologies, hardware-software co-design, and practical applications in industrial control systems.
