Dr Shahedur Rahman is a Senior Lecturer in Computer Science at Middlesex University , with extensive contributions to telecommunications engineering, image processing, and bioinformatics. His research focuses on wireless network optimization, perceptual distortion metrics for video coding, and molecular biology database integration. Research Interests : Interference management in LTE/5G networks Perceptual quality assessment in multimedia systems Computer vision for accessibility and mobility aids Integration of biological and medical databases Wavelet-based image compression Genomic data analysis Selected Scientific Publications highlight trends in: Dynamic channel allocation techniques for LTE networks SSIM/SATD hybrid distortion metrics Gene mutation data modeling Image processing for visual impairment assistance Database interoperability in medical systems Optimization algorithms for hardware systems
Dr. Hong Yu is an Associate Professor in the Engineering Technology department at Fitchburg State University's School of Business and Technology. Specializing in wireless communication protocols, neural networks, and embedded systems, their research spans earthquake nowcasting, IoT applications, and industrial sensor development. Current projects include 5G network optimization and FPGA-based measurement systems. PhD in Electrical & Electronics Engineering from The Catholic University of America Active in NSF-funded initiatives like the Microcontroller Training System project Professional affiliations include IEEE Senior Membership and leadership roles in multiple IEEE chapters Teaches courses in microprocessor systems, digital electronics, and mobile application development Research focuses on merging biological neural network principles with technological applications, while maintaining expertise in analog electronics and environmental monitoring. Recent publications emphasize wireless protocol design (2021), color sensing automation (2021), and cross-platform smart home development (2020), showing consistent innovation across 5G networking, semiconductor design, and seismic analysis. Professional contributions include serving as Vice Chairperson in IEEE ROBOT Chapter (Worcester County) and IEEE AESS Chapter (Baltimore), plus judging robotics competitions like FIRST LEGO League.
Claudio Talarico is a Professor in the Department of Electrical and Computer Engineering at Gonzaga University's School of Engineering & Applied Science. He holds a Ph.D. in Electrical Engineering from the University of Hawaii and an M.S. from the University of Genoa, Italy. With industry experience at Infineon Technologies, IKOS Systems, and Marconi Communications, his expertise spans VLSI design, embedded systems, and hardware/software co-design. His research focuses on: Low-power/high-performance VLSI circuits Embedded system-on-chip design Computer-aided design methodologies Wireless communication systems Hardware/software co-design Recent publications (2020-2024) demonstrate strong emphasis on: Beam steering architectures for 5G/wireless systems Angle-of-arrival estimation techniques Time synchronization in body area networks Health monitoring platforms FPGA/digital implementations He teaches core courses including VLSI Circuits & Systems, Computer Hardware Design, and Digital Systems. No awards or current students are documented in available materials.
Vikram Adve is the Donald B. Gillies Professor of Computer Science at the University of Illinois at Urbana-Champaign, with appointments in both the Computer Science Department and the Center for Digital Agriculture. He co-founded and co-leads the Center for Digital Agriculture and serves as the director of AIFARMS, a $20M National Artificial Intelligence Research Institute funded by USDA NIFA and NSF. Adve has been a professor at UIUC since August 2011 and previously served as Interim Head of the Computer Science Department from 2017 to 2019. Adve received his Ph.D. in Computer Science from the University of Wisconsin-Madison in 1993. His academic journey has been marked by significant contributions to compiler infrastructure and computer systems research, culminating in his current distinguished professorship at one of the world's leading computer science departments. Adve's research spans multiple cutting-edge domains in computer systems. His work on the LLVM Compiler Infrastructure has revolutionized how software is compiled and optimized across diverse hardware platforms. Currently, his research focuses on three primary thrusts: Digital Agriculture and AI : Through the Center for Digital Agriculture and AIFARMS Institute, he's developing AI solutions for agricultural challenges, including the CropWizard system for generative AI in farming Edge Computing : His HPVM, ApproxHPVM, and ApproxTuner projects address the programming challenges of heterogeneous computing at the network edge Compiler Innovation : His Hydride and MISAAL projects use program synthesis to automatically build compilers for complex hardware architectures His work bridges theoretical compiler research with practical applications in agriculture, autonomous systems, and distributed computing. Adve's publication record demonstrates a consistent trajectory from foundational compiler research to applied AI systems. Early work focused on memory safety (SAFECode), deterministic parallel programming (DPJ), and the LLVM infrastructure. More recently, his publications reflect a strategic pivot toward agricultural AI and edge computing, with significant contributions to generative AI applications, compiler techniques for heterogeneous systems, and multimodal data processing for precision agriculture. His work maintains strong theoretical foundations while addressing real-world challenges in resource-constrained environments. Adve's scientific recognition includes numerous prestigious awards: ACM Software System Award (2012) for LLVM ACM Fellowship (2014) NSF CAREER Award (2001) Multiple best paper awards at top conferences including PLDI 2005, SOSP 2007, and CGO 2004 (retrospective) University Scholar designation at UIUC (2015) Donald B. Gillies Professorship (2018) Distinguished Alumnus Award from IIT Bombay (2023) As an advisor, Adve has mentored numerous successful students, including Chris Lattner (co-creator of LLVM), Robert Bocchino (ACM SIGPLAN Outstanding Dissertation Award winner), and John Criswell (ACM Doctoral Dissertation Award Honorable Mention). His research group has secured significant funding from diverse sources including USDA NIFA, NSF, Intel Corporation, Amazon-Illinois AICE Center, and the state of Illinois through the Discovery Partners Institute. Current projects include the $20M AIFARMS institute and multiple edge computing initiatives focused on agricultural robotics and distributed AR/VR systems. Adve leads the Programming Languages, Systems, and Networking research group at UIUC, which maintains strong connections with industry partners. His group's work on LLVM has had widespread industry impact, with applications in Apple's iOS ecosystem, Android, NVIDIA GPUs, and numerous other commercial products. The group's current focus on agricultural AI through the Center for Digital Agriculture represents a strategic expansion into domain-specific applications of systems research.
Kevin Skadron is the Harry Douglas Forsyth Professor of Computer Science at the University of Virginia's School of Engineering and Applied Science, where he has been faculty since 1999. He previously served as department chair from 2012-2021 and has made significant contributions to computer architecture research. Dr. Skadron received his B.S. in Electrical and Computer Engineering and B.A. in Economics from Rice University in 1994, and his Ph.D. in Computer Science from Princeton University in 1999. He spent the 2007-08 academic year on sabbatical at NVIDIA Research. His research focuses on computer architecture, particularly novel heterogeneous processor organizations, accelerator architecture, processing in memory, and automata processing. He has pioneered work in processing-in-memory (PIM) architectures, automata processing for pattern matching, and heterogeneous computing systems. His work addresses critical challenges in thermal management, power delivery, process variations, and wear-out in modern computing systems. Current projects include Fulcrum, Gearbox, Sieve, and DRAM-CAM architectures, along with the development of the PIMeval simulation framework and PIMbench benchmark suite. Skadron's recent publications reveal a strong focus on processing-in-memory architectures, with numerous papers on PIM design, benchmarking, and applications. His research also emphasizes automata processing for pattern matching, with contributions to FPGA-based implementations and programming models. Many of his recent works address graph processing acceleration, bioinformatics applications, and memory system optimization, demonstrating the practical impact of his theoretical contributions. Dr. Skadron has received numerous accolades including the 2023 SRC/SIA University Research Award for lifetime research contributions to the U.S. semiconductor industry, the 2011 ACM SIGARCH Maurice Wilkes Award, and is a Fellow of both IEEE and ACM. He was also named a University of Virginia Teaching Fellow for 2003-04. Skadron has advised numerous graduate students, with recent PhD graduates now working at leading companies like IBM, AMD, Apple, and Black Sesame. His research has been supported by the National Science Foundation, Semiconductor Research Corporation, DARPA, and industry partners including NVIDIA, Intel, and Micron. He co-founded IEEE Computer Architecture Letters and served as editor-in-chief from 2010-2012. He is actively involved in the UVA Center for Automata Processing (CAP) and has served as director for the SRC JUMP 1.0 Center for Research on Intelligent Storage and Processing in Memory (CRISP). He is currently a member of the SRC JUMP 2.0 Center for Research on Processing in Storage and Memory (PRISM).
Thomas Bourgeat is an Assistant Professor at EPFL, starting May 2023. He completed his PhD at MIT under the guidance of Arvind (CSG) and Adam Chlipala (PLV), focusing on the intersection of computer architecture and programming languages. PhD in Computer Science at MIT His research focuses on leveraging high-level hardware programming languages to design and verify hardware, particularly through theorem proving. He also explores security implications of microarchitectural features and domain-specific accelerators. Recent publications highlight trends in hardware security, domain-specific accelerators, and formal verification. His work includes projects like riscy-OOO and formal RISC-V specifications. Thomas actively recruits PhD students and postdocs. Prospective applicants can find details at EPFL's EDIC program .
Sebastian Hack is a Professor of Computer Science at Saarland University since 2010. He previously served as an assistant professor at the same university (2008-2010), a Post-Doc at EPFL in the LAMP lab, and a Post-Doc with INRIA at ENS Lyon. His research focuses on compiler construction, domain-specific languages, program analysis and synthesis, code generation, and vectorization. Recent publications highlight advancements in program synthesis (Sorting Kernels), memory safety instrumentations, automatic differentiation frameworks (MimIrADe), microarchitectural analysis (AnICA), and GPU acceleration for bioinformatics (Anyseq/gpu). His work bridges theoretical compiler design with practical applications in high-performance computing and security. He has held administrative roles as Dean of Study Affairs (2012-2014) and Dean of the Department of Mathematics and Computer Science (2018-2020). His software contributions include libFirm and GrGen , and he maintains active involvement in projects like AnyDSL and UniAna.
Roland Leißa is an Assistant Professor in the School of Business Informatics and Mathematics at the University of Mannheim, Germany. His research focuses on programming languages, compilers, and domain-specific languages (DSLs) for high-performance computing across heterogeneous architectures. He teaches courses on parallel programming, compiler construction, and advanced programming topics. His work emphasizes automatic parallelization, intermediate representations, and program optimizations, particularly through partial evaluation techniques. He has contributed to tools like MimIR, AnyDSL, and FLOWER, which address challenges in GPU programming, FPGA synthesis, and ray tracing. Roland leads research on abstracting industrial and scientific application problems into reusable, theoretically sound compiler solutions. His projects span sequence alignment accelerations, dataflow compilation, and vectorization strategies, targeting modern hardware including GPUs and SIMD architectures. Contact: leissa@uni-mannheim.de | Personal Website | ORCID: 0000-0002-2444-6782
Gabriele Filipponi is a third-year Ph.D. student in Computer and Control Engineering at Politecnico di Torino (38th cycle, 2022–2025). He serves as a Part-Time Lecturer and Teaching Assistant at the Department of Control and Computer Science (DAUIN) for Operating Systems courses. His research focuses on embedded electronics testing and ultra-reliable in-field manufacturing techniques for automotive SoCs, leveraging Logic Built-In Self-Test (LBIST) and functional procedures. Research Areas: Embedded Systems Testing Automotive Electronics Computer Architecture Semiconductor Reliability Fault Diagnosis Publication Trends: His work spans 2022–2025 and addresses logic/memory BIST methodologies, in-field diagnostics for automotive SoCs, fault characterization, and firmware-controlled testing frameworks. Teaching Roles: Course Collaborator for Operating Systems (Computer Engineering, 2023–2025) Course Collaborator for Operating Systems (Computer Science Engineering, 2023–2025)
C. Emre Dedeağaç is a Researcher and Ph.D. candidate in Computer Engineering at Özyeğin University's Faculty of Engineering. His academic roles focus on Electrical and Electronics Engineering, with research activities spanning advanced computing disciplines. Education: B.Sc. in Electrical and Electronics Engineering, Özyeğin University (2020) Minor in Computer Science/Engineering, Özyeğin University Ph.D. in Computer Engineering, Özyeğin University (ongoing) Research Interests: Specializing in ASIC/SOC/FPGA Design/Automation and Neural Network Accelerators for hardware optimization Contributing to fundamental research in Computer Arithmetic and Embedded Systems Exploring intersections with Machine Learning and High-Frequency Trading (HFT)
Prof. Dr. Carsten Trinitis is a full professor at the Chair of Computer Architecture & Parallel Systems within the TUM School of Computation, Information and Technology. Specializing in high-performance computer architecture with a unique focus on spaceflight applications and informatics ethics, he leads the 'Gesellschaft für Informatik und Ethik' (Society for Informatics and Ethics). Ph.D. in Electrical Engineering from TUM (1998) Industry experience before returning to academia Former Assistant Professor in History of Science (2002-2010) at Universität der Bundeswehr München Full Professor of Distributed Computing at University of Bedfordshire (2010-2014) His research spans three major domains: High-Performance Computing: Focused on microprocessor architectures, hardware-oriented optimizations, and co-design approaches. Recent work includes GPU power capping strategies and Data Distribution Service (DDS) middleware enhancements. Space Systems: Pioneering computer architectures for nanosatellites with projects like MOVE-II mission and MicroPython-based satellite control systems. Digital Ethics: Through his 'Gewissensbits' initiative, he explores ethical decision-making frameworks for technology and contributes to the German Informatics Society's ethical guidelines. Key publication trends show interdisciplinary work connecting: HPC systems and edge AI applications FPGA-based verification and RISC-V processors Time series analysis at petascale performance Hardware-software co-design for extreme environments Continued emphasis on ethical computing frameworks Scientific Recognition: TeachInf Award for Outstanding Teaching (2023) Hans Meuer Award for Best Paper (2020) ZARM Master Thesis Awards (2016, 2017) Prof. Trinitis leads multiple research projects including: SEANERGYS (EuroHPC) - Energy-efficient computing systems PlasmaPEPS - Plasma physics simulation environments OpenCUBE - Open computing frameworks for space MUNIQC-ATOMS - Quantum computing integration
Mario Roberto Casu is an Associate Professor in the Department of Electronics and Telecommunications (DET) at the Polytechnic University of Turin, where he also serves as a contact person for the Degree Course in Electronic Engineering. He is a member of the Interdepartmental Center SmartData@PoliTO - Big Data and Data Science Laboratory and actively contributes to the VLSILAB research group. Dr. Casu received his laurea degree summa cum laude in electronics engineering and his Ph.D. in electronics and communications engineering from the Polytechnic University of Turin in 1998 and 2001, respectively. He has held visiting researcher positions at Columbia University (2010-2011), National University of Singapore (2017), and CEA Grenoble (2001), as well as a visiting professorship at Chongqing Technology and Business University (2016). His research spans several interconnected domains focused on hardware implementation of advanced computing systems. Dr. Casu's work primarily addresses Embedded Machine Learning through heterogeneous embedded systems (ASICs, FPGAs, CPUs, GPUs), System-on-Chip design including latency-insensitive approaches and Network-on-Chip architectures, Microwave Imaging for both biomedical (breast cancer and stroke detection) and industrial applications (food contamination detection), and Ultra-Wide Band technologies for biomedical applications. His research bridges theoretical design methodologies with practical industrial applications across biomedical, automotive, and food sectors. Dr. Casu's recent scholarly output demonstrates a clear trajectory toward optimizing hardware implementations for machine learning workloads, particularly through FPGA-based solutions and precision-scalable multipliers. His work increasingly integrates microwave sensing technologies with machine learning for specialized applications like food contaminant detection, while maintaining strong foundations in traditional VLSI design and system-level optimization techniques. As an academic leader, Dr. Casu serves on the editorial board of IEEE TRANSACTIONS ON AGRIFOOD ELECTRONICS and regularly participates in program committees for major international conferences including DATE, ICCAD, DAC, and VLSI-SoC. He has been involved in 9 national academic research projects (2 as principal investigator), 2 European academic research projects, and 7 national and international industrial projects (2 as principal investigator). Dr. Casu actively mentors the next generation of engineers, currently supervising multiple PhD students including Lorenzo Lagostina, Edward Manca, Teodoro Urso, Fabrizio Ottati, and Luca Urbinati. His teaching portfolio includes courses such as Integrated Systems Technology, Microelectronics Digital Design, and Embedded Electronic Systems for AI/ML across both bachelor's and master's programs in Electronic and Computer Engineering. His laboratory work centers around the VLSILAB Group at DET, where his team develops innovative solutions in hardware acceleration for machine learning, microwave imaging systems, and system-level design methodologies. Current projects include the EU-funded GreenChips-EDU initiative for sustainable microelectronics education and industry collaborations with companies like Infineon Technologies on coarse-grained reconfigurable array architectures for machine learning applications.
Hao Zhang is a Research Fellow at the School of Electrical and Data Engineering, Faculty of Engineering and Information Technology, University of Technology Sydney (UTS). He is affiliated with the Global Big Data Technologies Centre (GBDTC) at UTS, where he conducts cutting-edge research in high-speed wireless communications and FPGA-based real-time implementation. His work focuses on advancing terahertz and millimeter wave communication systems for next-generation wireless applications. Hao Zhang's educational background includes: Ph.D. in Engineering from the University of Technology Sydney (2019) M.Eng. in Electronics and Communication Engineering from Xidian University, China (2014) B.Eng. in Electronics and Communication Engineering from Xidian University, China (2011) Hao Zhang's research primarily centers on high-speed wireless communications, with a specific focus on real-time implementation using field-programmable gate arrays (FPGAs). His current work explores enhancing algorithm deployment efficiency on FPGAs through advanced LLM-assisted hardware design methodologies, leading to significant improvements in algorithm-hardware co-design and overall system performance. His expertise spans terahertz communication systems, millimeter wave technologies, signal processing, and wireless system implementation. Zhang's research has practical applications in 6G communications, point-to-point links, backhaul networks, and intersatellite communications where atmospheric attenuation is minimal. Analysis of Zhang's recent publications reveals a strong focus on pushing the boundaries of high-speed wireless communication, particularly in the terahertz spectrum. His work consistently demonstrates real-time implementations achieving data rates of 30-50 Gbps, with increasing sophistication in signal processing techniques. The research shows a progression from basic system demonstrations to more advanced implementations incorporating interference suppression, full-duplex capabilities, and nonlinearity mitigation. His publications span both journal articles in prestigious IEEE transactions and conference presentations at major international venues, indicating strong recognition in the wireless communications research community. Hao Zhang has collaborated extensively with researchers across various institutions, particularly within the University of Technology Sydney ecosystem. His work often involves interdisciplinary collaboration between signal processing experts, antenna designers, and hardware implementation specialists. While specific grant information isn't detailed in the provided text, his consistent publication record suggests active funding support for his research activities in high-speed wireless communications. Zhang is part of the Global Big Data Technologies Centre (GBDTC) at UTS, which appears to be a multidisciplinary research center focused on advanced communication technologies. His work within this center involves close collaboration with other researchers working on various aspects of wireless communication systems, from theoretical signal processing to practical hardware implementation. The center likely provides the specialized laboratory facilities necessary for terahertz and millimeter wave research, including advanced signal generators, spectrum analyzers, and FPGA development platforms.
Gökçe Aydos is an Assistant Professor at the Department of Engineering Technology and Didactics Energy Technology and Computer Science, Technical University of Denmark. Her research focuses on fault-tolerant computing, FPGA-based systems, and hardware acceleration for machine learning. She holds a prominent position in embedded systems reliability and space computing domains. Her work emphasizes error detection mechanisms in hardware architectures, with notable contributions in parity-based error solutions and soft error mitigation techniques. Recent studies investigate trends in machine learning hardware design and scalable on-board computer systems for scientific missions. Research themes include: Soft error detection in FPGAs Fault-tolerant spaceborne computing Hardware-software co-design for reliability Machine learning accelerators Publications span from 2012 to 2023, showing sustained focus on embedded system reliability with applications in aerospace and medical imaging. No scientific awards have been listed in available records. Advising and grants information is not explicitly stated in provided materials. Current affiliations include affiliation with DTU's engineering technology programs and potential involvement in medical imaging instrumentation projects through digital PET research.
Gregory D. Peterson is a Professor in the Min H. Kao Department of Electrical Engineering and Computer Science at the University of Tennessee, Knoxville, and Director of the National Institute for Computational Sciences. His research focuses on advanced computer architectures, high-performance reconfigurable computing, computational science, and electronic systems design automation. He holds a DSc and MS in Electrical Engineering and Computer Science from Washington University (1990-1994). Education: DSc (1994), MS (1992), and dual BS (1990) in Electrical Engineering and Computer Science from Washington University. Research interests include reconfigurable computing, stochastic simulation, bioinformatics applications, and verification methodologies. He has authored over 50 peer-reviewed publications and holds leadership roles in IEEE standards committees. Key awards: John W. Fisher Professorship (2001), Best Paper Award (2000), and Air Force commendations. His work spans defense systems, embedded systems education, and computational biology. Grants and collaborations include NSF, Air Force Research Lab, DARPA, and ORNL. He advises numerous graduate students and leads projects in accelerated computational chemistry and biology. Labs/Teams: Director of National Institute for Computational Sciences, UT’s supercomputing center.
