Find Academic Supervisors

• Computer Architecture
• Computer Systems
• Compilers
• +8 more

José Cano Reyes is a Senior Lecturer (Associate Professor) at the University of Glasgow's School of Computing Science, leading the Glasgow Intelligent Computing Lab (gicLAB) and serving as deputy Head of the GLAsgow Systems Section (GLASS). His academic career includes postdoctoral roles at the University of Edinburgh (2014-2018) and Universitat Politècnica de Catalunya (2012-2013), with a PhD and engineering degree from Universitat Politècnica de Valencia (2004-2012). He has held visiting and guest lecturer positions at Edinburgh and Glasgow across computer architecture, compilers, and embedded systems topics. Research focuses on hardware-software co-design for edge AI, including DNN acceleration (FPGA/GPU), encrypted AI systems, and secure mission-critical SoCs. Key projects include EU's dAIEDGE, EPSRC IDEAL, and UKRI AppControl. He leads over 15 research staff and students in areas like quantization, sparsity exploitation, and robust AI deployment. Notable contributions span 100+ peer-reviewed publications across top venues (ISCA, IJCNN, IEEE TPDS) and 3 authored books on ad hoc networks and embedded systems. Academic service includes organizing 20+ conferences (ISPASS, Euro-Par, ASPLOS) and serving on editorial boards for ACM TACO and IEEE TPDS. His educational efforts include teaching Computer Architecture (Year 4), Computer Systems (Year 1), and supervising over 20 PhD/MSc students since 2017.

Rodrigo FonsecaView profile

Associate Professor

• distributed systems
• networking
• operating systems
• +5 more

Rodrigo Fonseca is an Associate Professor with Tenure in the Computer Science Department at Brown University's School of Engineering. He received his PhD from UC Berkeley in 2008 under Ion Stoica, focusing on execution tracing for distributed systems. His educational background includes a PhD in Computer Science from UC Berkeley (2008). Fonseca's research focuses on distributed systems, networking, and operating systems, with particular interest in understanding complex system behavior. His work spans distributed tracing and debugging (X-Trace, Pivot Tracing), network management in datacenters (2DFQ, Planck), power management in mobile systems (Quanto, Application Modes), and software-defined networking (Participatory Networking, Simon). His research integrates theoretical insights with practical implementations that have influenced both academic and industrial systems. His publication record shows a strong focus on distributed system instrumentation, with recurring themes of causal tracing, resource management, and network monitoring. The most recent publications demonstrate continued innovation in data-aware indexing structures, in-network packet analysis, and context propagation techniques for distributed systems. Fonseca has received significant recognition including an NSDI Test of Time Award for X-Trace, an NSF CAREER Award, and a Best Paper Award at SOSP for Pivot Tracing. His work has been consistently published in top-tier venues including SIGCOMM, NSDI, SOSP, and OSDI. He has mentored numerous graduate students, with five PhD graduates as of 2019 who have gone on to positions at Google, Microsoft, Apple, and MPI-SWS. His research has been supported by funding from the National Science Foundation, Google, Intel, and Microsoft Research, where he also spent visiting periods. He is actively involved in the research community, having served on program committees for major conferences and co-organizing workshops including HotCloud and the New England Networking and Systems Day. In 2019-2020, he served as PC co-chair for HotNets and General Chair for SoCC'2020.

Soner OnderView profile

Professor

• Computer Architecture
• Processor Design
• Memory Systems
• +3 more

Soner Onder is a Professor in the Department of Computer Science at Michigan Technological University, with an affiliated appointment in the Electrical and Computer Engineering department. His work focuses on computer architecture, programming languages, and simulation techniques, contributing significantly to processor design and memory systems research. Dr. Onder received his PhD in Computer Science from the University of Pittsburgh in 1999. His academic career has established him as a leading researcher in computer architecture with publications spanning two decades in top-tier conferences. Dr. Onder's research spans multiple areas of computer architecture and compiler design, with emphasis on processor design, memory systems, and compiler optimizations. He has made significant contributions to memory disambiguation techniques, branch prediction mechanisms, and energy-efficient processor designs. His work often bridges hardware and software domains, exploring how compiler techniques can better exploit architectural features. Recent research focuses on memory dependence prediction, recovery mechanisms for mispredictions, and energy-efficient data access patterns, with his "Future Gated Single Assignment Form" representing an innovative approach to program representation that bridges compiler design and architectural support. US Patent 7747993: Methods and systems for ordering instructions using future values (2010) Dr. Onder has advised numerous PhD students to completion, including Scott Pomerville (2024), Gorkem Asilioglu (2020), Omkar Javeri (2020), and Zhaoxiang Jin (2018). His research has been supported by grants including "Statically Controlled Asynchronous Lane Execution (SCALE)" and "Vectorized Instruction Space (VIS)" projects. He developed the FAST (Flexible Architecture Simulation Tool) for architectural research and continues to lead an active research program with publications appearing in top-tier venues through 2018. Dr. Onder leads research in computer architecture with a focus on practical implementations. His FAST simulation tool provides a flexible platform for testing architectural innovations. His work often involves collaboration with both compiler researchers and hardware designers to create holistic solutions to performance bottlenecks in modern processors, demonstrating the interdisciplinary nature of his research that bridges hardware and software concerns in computer system design.