Lev Kirischian is an Associate Professor at the Department of Electrical and Computer Engineering , Toronto Metropolitan University. He established the Embedded and Reconfigurable Systems Laboratory in 1999 for research and graduate studies. His expertise spans reconfigurable computing, parallel systems, and embedded design. BSc/MASc in Aerospace Control Systems, Moscow Institute of Aviation Technology (MAI) PhD in Parallel and Reconfigurable Computing Systems, Moscow Power Engineering Institute (MPEI) Research Interests : Task-adaptive reconfigurable computing systems Automated architectural synthesis of data-flow parallel computers FPGA-based stream processors Article Trends : His recent research focuses on reconfigurable computing architectures, modular system optimization, and FPGA applications in aerospace and industrial systems. Work includes radiation protection for FPGAs, multi-parametric architecture optimization, and frameworks for parallel multi-tasking environments.
Garnet K. Chan is the Bren Professor of Chemistry and Director of the Rudolph A. Marcus Center for Theoretical Chemistry at the California Institute of Technology. He received his B.S. from the University of Cambridge in 1996 and his M.A. and Ph.D. from the University of Cambridge in 2000. Dr. Chan's research lies at the interface of theoretical chemistry, condensed matter physics, and quantum information theory, focusing on quantum many-particle phenomena and the numerical methods to simulate them. His group has developed numerous methodologies including density matrix renormalization and tensor network algorithms, canonical transformation-based down-foldings, local quantum chemistry methods, quantum embeddings, and new quantum Monte Carlo algorithms. His work addresses problems that appear naively exponentially hard but where understanding of physics, particularly entanglement structure, allows for calculations of polynomial cost. Analysis of his recent publications reveals a strong focus on quantum simulation techniques, particularly tensor network methods applied to strongly correlated systems. His research spans fundamental theoretical developments to practical applications in quantum computing, molecular simulation, and materials science, with increasing integration of machine learning techniques and GPU acceleration in computational chemistry frameworks. Dr. Chan leads an active research group at Caltech dedicated to simulating chemical and physical systems at the level of many-particle quantum mechanics. His group has welcomed numerous researchers including Kasra Hejazi, Zuxin Jin, Zhihao Cui, Ke Liao, Henrik Larsson, and Wenyuan Liu. He teaches courses in Physical Chemistry (Ch 21 abc) and Advanced Quantum Chemistry (Ch 225), contributing significantly to theoretical chemistry education at Caltech.
Eleonora Vacca is a PhD student and Research Fellow in the Department of Automatic Control and Computer Science (DAUIN) at the Polytechnic University of Turin. She holds a B.S. in Electronic Engineering from the University of Palermo (2018) and an M.S. in Electronic Engineering-Embedded Systems from Politecnico di Torino (2021). Her research focuses on digital hardware design, reliability engineering, reconfigurable devices, and AI applications in aerospace and safety-critical systems. She is a member of the Aerospace and Safety Computing Lab and the CAD - Electronic CAD & Reliability Group (DAUIN). Her work addresses challenges such as radiation effects mitigation in space missions, fault-tolerant AI accelerators, and real-time anomaly detection in satellite telemetry. She has contributed to projects like the RAMSES CubeSat-1 Development (2025-2026), funded by commercial contracts. In 2024, she won the Best Student Paper Award at the NEWCAS Conference for her research on radiation effects in space missions. Vacca collaborates on teaching, including assisting in the course 'Electronic Calculators' for Computer Engineering students. Her recent publications explore AI resilience in RISC-V ecosystems, radiation environment analysis for space missions, and gesture recognition systems for smart cities. She actively contributes to conferences such as the ACM International Conference on Computing Frontiers and the IEEE International Smart Cities Conference.
Rabi N. Mahapatra is a Professor in the Department of Computer Science & Engineering at Texas A&M University, within the College of Engineering. His research focuses on embedded systems, reconfigurable architectures, real-time systems, and semantic networks. He holds a Ph.D. in Computer Engineering from the Indian Institute of Technology (1992), an M.S. in Electrical Engineering (Sambalpur University, 1984), and a B.S. in Electronics & Communication (Sambalpur University, 1979). His research interests include Network-on-Chip (NoC), data analytic co-design, IoT protocols, and temperature-aware energy management. His work emphasizes hardware-software co-design for complex systems, with applications in many-core processors, semantic search engines, and real-time embedded systems. Key publications highlight contributions to collaborative filtering on many-core architectures, low-jitter clock distribution circuits, and energy-efficient scheduling. He has been recognized as an IEEE Computer Society Distinguished Visitor (2005–2007) and received the BOYS-CAST Indo-US Young Scientist Award. He leads the Codesign Embedded Systems group at Texas A&M, exploring cutting-edge topics such as photonics NoC, reservoir computing, and IoT security. His research bridges theory and practice, addressing challenges in scalable systems and embedded applications.
Felix Xiaozhu Lin serves as Associate Professor and William Wulf Faculty Fellow in the Department of Computer Science at the University of Virginia's School of Engineering and Applied Science, where he directs the Computer Science Ph.D. Program and MCS/MS Program. Previously a tenured Associate Professor at Purdue University's School of Electrical and Computer Engineering, Lin joined UVA Engineering in August 2020 after completing his doctoral research at Rice University. His educational credentials include: Ph.D. in Computer Science, Rice University (2014) M.S. in Computer Science, Tsinghua University (2008) B.S. in Automation, Tsinghua University (2006) Lin's research centers on systems software at the intersection of operating systems, compilers, and computer architecture, with emphasis on accelerating and safeguarding software systems. His current projects target on-device large language models and speech processing for low-cost hardware ( Analysis of his recent publications reveals a strong trajectory in edge computing and efficient AI systems. His research demonstrates increasing focus on hardware-software co-design for autonomous devices, with significant contributions in video analytics for energy-constrained cameras, kernel virtualization for heterogeneous architectures, and stream processing frameworks leveraging emerging memory technologies. The work consistently addresses real-world constraints like power limitations and network intermittency while maintaining rigorous academic standards. His scientific recognition includes: National Science Foundation CAREER Award (2019) Google Faculty Research Award (2016) NSF CISE Research Initiation Initiative Award (2015) ACM ASPLOS Best Paper Award (2014) Lin leads the XSEL research group mentoring graduate and undergraduate students in systems software development. His educational initiatives include CS4414/CS6456, a modern operating systems course featuring Arm64 baremetal kernel development, multicore systems, trusted execution environments, and filesystem forensics. The course's experiential approach has received strong student feedback for its modern content and practical relevance. His group actively recruits for projects spanning on-device AI, hardware-accelerated speech processing, and next-generation OS development. Based in Charlottesville, Virginia, Lin's research benefits from UVA's proximity to Shenandoah National Park and collaborative opportunities within the university's vibrant computing ecosystem, including the 2024 LLM Workshop he co-organized with Professor Yangfeng Ji.
David Wentzlaff is a Professor of Electrical and Computer Engineering at Princeton University, with associated faculty roles in Computer Science and the High Meadows Environmental Institute (HMEI). He leads research in computing architecture, green computing, and sustainable system design. As Director of Undergraduate Studies, he shapes educational programs in his field. Education: Ph.D., Electrical Engineering, MIT (2012) M.S., Electrical Engineering and Computer Science, MIT (2002) B.S., Electrical Engineering, University of Illinois at Urbana-Champaign (2000) Research Focus: Future Computing Systems: Designing manycore architectures, cloud computing infrastructure, and chiplet-based systems for exascale computing. Sustainability: Developing energy-efficient hardware, recyclable computing systems, and eco-friendly decommissioning strategies. Hardware-Software Co-Design: Exploring FPGA integration, in-memory computing, and parallel processing frameworks. Advising & Grants: Advises 8 current graduate students, focusing on topics like chiplet design, neural acceleration, and sustainable computing. Recipient of NSF grants for projects like OpenPiton (open-source manycore research platform) and CAREER awards for energy-efficient architectures. Labs & Collaborations: Leads the Wentzlaff Research Group at Princeton. Develops open-source frameworks like PRGA (FPGA prototyping) and OpenPiton (manycore processor).
Dr.-Ing. Thomas Wild serves as an Academic Director at the Technical University of Munich (TUM), working within the TUM School of Computation, Information and Technology at the Chair of Integrated Systems. He maintains an active research and teaching role at the institution, with his office located in Building N1 (Theresienstr. 90), Room N2136 in Munich, Germany. Dr. Wild's research focuses on advanced computing architectures, with particular emphasis on manycore system on chip (SoC) architectures, network processor (NPU) architectures, on-chip communication architectures including networks on chip (NoC), and system level design methodologies. His work bridges theoretical research with practical implementation, often exploring design space exploration techniques to optimize system performance. The evolution of his research over two decades demonstrates a consistent focus on improving communication architectures and system-level design for embedded and high-performance computing platforms. His recent publications (2023-2025) reveal a growing integration of machine learning techniques with traditional hardware design, particularly in optimizing power-performance tradeoffs in embedded systems. There's a clear trend toward hardware-software co-design approaches, with significant work on SmartNICs, Linux system optimization, and network processing acceleration. His research shows strong interdisciplinary connections between computer architecture, networking, and machine learning. EUROPRACTICE representative for TUM city campus, facilitating access to commercial EDA tools for academic purposes Active collaborator with Professor Andreas Herkersdorf and other researchers at TUM Focus on practical implementations with FPGA-based prototyping and real system modifications Dr. Wild teaches several hardware design courses including VHDL Lab, SystemC Lab, and HW/SW Codesign, contributing to the education of next-generation computer engineers. His teaching directly complements his research in system design and hardware acceleration, providing students with hands-on experience in cutting-edge technologies.
Mads Dam is a Professor in Teleinformatics at the School of Computer Science and Communication at Kungliga Tekniska Högskolan (KTH), where he heads the Department of Theoretical Computer Science. His research focuses on computer security, formal methods, and program logics, with particular emphasis on the formal modeling and verification of low-level hardware and software execution platforms for security and application isolation. His educational background includes: PhD in Computer Science from the University of Edinburgh (1990) MSc in Computer Engineering from Aalborg University, Denmark BSc in Information Technology from Aalborg University, Denmark Mads Dam's research interests center on computer security, formal methods, and program logics. His current work focuses on the formal modeling and verification of low-level hardware and software execution platforms such as hypervisors and OS kernels and their underlying hardware. He has made significant contributions to information flow security, verification of microarchitectural systems, and network programming language security. His research bridges theoretical foundations with practical security applications. His recent publications show a strong trend toward verifying low-level systems, with a focus on information flow security for processors, network programming languages (particularly P4), and microarchitectural vulnerabilities. His work combines formal methods with practical security concerns, developing verification techniques that address real-world security challenges in hardware and software systems. The research spans theoretical foundations in temporal and epistemic logics to practical applications in network security and processor verification. His scientific awards and recognition include: Two framework grants from the Swedish Foundation for Strategic Research A junior individual grant from the Swedish Foundation for Strategic Research Project grants and a five-year research fellowship from the Swedish Research Council (VR) Project grants from Ericsson, Microsoft Research, US Air Force, and Vinnova (the Swedish Innovation Agency) Mads Dam has been a principal investigator on numerous research projects and has supervised many graduate students. He has been a partner in several European projects including HATS, S3MS, VerifiCard, LOMAPS, and UaESMC. His research has been supported by substantial grants from major funding bodies, reflecting the significance and impact of his work in computer security and formal methods. He is a founding member of several research centers at KTH, including Access, the CASTOR software research center, and the CDIS center for cyber defense and information security. These centers bring together researchers from multiple disciplines to address complex challenges in cybersecurity and software engineering.
Cynthia Sturton serves as Associate Professor and Peter Thacher Grauer Scholar in the Department of Computer Science at the University of North Carolina at Chapel Hill. She leads the Hardware Security @ UNC research laboratory focused on developing formal verification tools for hardware security analysis. Her educational background includes a Ph.D. (2013) and M.S. from UC Berkeley, and a B.S.Eng. from Arizona State University. Her research centers on hardware security, applied formal methods, and symbolic execution techniques for identifying security vulnerabilities in processor designs before fabrication. Sturton's research demonstrates consistent innovation in hardware security verification, particularly through tools like Sylvia (symbolic execution for Verilog) and SylQ-SV (SystemVerilog analysis with query caching). Her work bridges theoretical formal methods with practical security applications, addressing critical challenges like path explosion and security property generation at scale. Nominated for Best Paper award at IEEE/ACM MICRO 2018 Intel Hardware Security Academic Award, 2nd place ($50,000) at IEEE Symposium on Security and Privacy 2020 Selected as Top Picks in Hardware and Embedded Security 2021 She advises multiple graduate students including Rui Zhang and Calvin Deutschbein, and has secured significant research funding from NSF (Grants 1816637, 651276), Semiconductor Research Corporation, Intel, Google, and UNC Chapel Hill. Her Hardware Security @ UNC lab develops critical tools for security property generation and vulnerability detection in hardware designs.
Chester Rebeiro is an Associate Professor at the Department of Computer Science and Engineering within the Indian Institute of Technology Madras . His work spans hardware and software security with a focus on cryptographic implementations and microarchitectural vulnerabilities. Research interests include hardware security, applied cryptography, side channel analysis, and operating system security. He develops frameworks for automatic vulnerability detection and mitigation in cryptographic systems. Editorial Board: Associate Editor at Journal of Hardware and Systems Security (Springer, 2021-2024) Conference Leadership: General Co-Chair for SPACE 2024, Program Co-Chair for ATS 2024, and Program Co-Chair for INDOCRYPT 2023 Professional Activities: Organizer of e-CTF Embedded Capture The Flag and contributor to cybersecurity workshops across India and abroad Scientific contributions highlight two major awards: a Distinguished Paper Award at USENIX Security 2024 and a Best Paper Award at IEEE HOST 2020. His research focuses on practical security solutions for processors and cryptographic systems. Advising includes mentoring 11 PhD students and 7 MS by Research candidates, with notable co-guided projects in fault attack detection and side-channel mitigation. He actively contributes to educational initiatives through courses on Secure Processor Microarchitecture and Operating Systems.
Lisa Wills serves as Assistant Professor of Computer Science at Duke University's Trinity College of Arts & Sciences and holds a joint appointment in Electrical and Computer Engineering at the Pratt School of Engineering since 2019. Her research bridges computer architecture and domain-specific applications, with a focus on hardware acceleration for computationally intensive fields. Dr. Wills earned her Ph.D. from Columbia University in 2014. Her academic journey reflects a deep commitment to advancing hardware-software co-design methodologies for real-world computational challenges. Her research centers on developing efficient hardware accelerators for big data analytics, particularly in genomics, graph processing, and database systems. She pioneers frameworks that simplify accelerator deployment while tackling critical bottlenecks in genomic data analysis, protein structure prediction, and privacy-preserving computing. Current work focuses on hardware-aware machine learning systems and energy-efficient architectures for emerging AI applications. Analysis of her publication record reveals a clear trajectory: from foundational work in database processing units (2014-2016) to specialized genomic accelerators (2019-2021), then evolving toward ML-enhanced design automation (2022-2023) and cutting-edge architectural abstractions (2024-2025). Her research consistently targets the intersection of hardware efficiency and domain-specific computational demands, with increasing emphasis on AI/ML workloads. Google ML and Systems Junior Faculty Award (2025) Dr. Wills actively mentors doctoral students including Chris Kjellqvist (lead architect of Beethoven accelerator framework), Mason Ma (PyTFHE FHE framework), and Mansi Choudhary (COCOSSim accelerator simulator). Her research is supported by significant grants including the NSF AI Institute: Athena ($20M, 2021-2027), Meta-funded ProSE accelerator project (2023-2026), and NSF CAREER award (2021-2026), totaling over $25M in active funding. She directs the APEX Lab (Application-driven Programmable Efficient Accelerated Systems), which develops open-source frameworks like Beethoven for FPGA/ASIC accelerator deployment and focuses on lowering barriers for non-hardware researchers to leverage custom acceleration in genomics, AI, and big data applications.
Daniel J. Sorin is a Professor of Electrical and Computer Engineering at Duke University's Pratt School of Engineering, where he also serves as Associate Chair of Education. He holds joint appointments in both the Electrical and Computer Engineering department and Computer Science department, and is recognized as a Bass Fellow for his contributions to education and research. His research focuses on computer architecture with specific expertise in memory systems, cache coherence protocols, fault tolerance, and verification-aware design. Dr. Sorin's work bridges theoretical computer architecture with practical implementations, often incorporating coding theory to solve architectural challenges. His research group has made significant contributions to automated protocol generation, hardware acceleration, and robot motion planning systems. Dr. Sorin's publications reveal a consistent focus on memory consistency models, cache coherence protocols, and verification techniques. His recent work has expanded into robot motion planning acceleration, FPGA resource management, and novel error correction techniques for emerging memory technologies. The trend shows increasing interdisciplinary work connecting computer architecture with robotics and machine learning applications. Program Chair of HiPEAC 2017 Co-chair of IEEE Micro's Top Picks selection committee (2016) Lois and John L. Imhoff Distinguished Teaching Award (2011) NSF CAREER Award recipient IEEE Micro Top Pick awards (2011, 2015) ACM Senior Member As an advisor, Dr. Sorin has mentored numerous PhD students who have gone on to successful careers at leading technology companies including Google, Microsoft, Oracle, and Nvidia. His research group maintains strong industry connections and has produced influential work in cache coherence protocols, memory systems, and fault-tolerant architectures. He has also authored the widely-used textbook 'A Primer on Memory Consistency and Cache Coherence' (2nd edition). Dr. Sorin leads an active research laboratory focused on next-generation computer architecture challenges, with ongoing projects in hardware acceleration, memory systems, and robot motion planning. His group collaborates with researchers across multiple disciplines including robotics, coding theory, and semiconductor design.
Moinuddin Qureshi is a Professor of Computer Science at Georgia Institute of Technology, affiliated with the School of Computer Science and involved in the Online Master of Science in Computer Science (OMSCS) program. He holds a Ph.D. and M.S. from the University of Texas at Austin. His research focuses on computer architecture, memory systems, hardware security, and quantum computing, with notable contributions to mitigating rowhammer vulnerabilities and advancing quantum error correction. Previously, he was a Research Staff Member at IBM T.J. Watson Research Center (2007–2011), where he contributed to caching algorithms for Power-7 processors. He has held leadership roles, including Program Chair of MICRO 2015 and Selection Committee Co-Chair of Top Picks 2017. His work has been recognized with prestigious awards, including the 2019 Persistent Impact Prize and multiple best paper awards. Key research areas include secure memory design (e.g., rowhammer mitigation techniques like MINT and Moat), quantum computing (e.g., Flag-Proxy Networks and Élivágar), and hardware vulnerability analysis (e.g., Roguerfm attacks and COAXIAL memory systems). His publications span 2009–2025, addressing topics like error correction, secure tracking, and quantum annealing optimization. Awards include membership in ISCA, MICRO, and HPCA Hall of Fame, alongside contributions to conferences like HiPC and IEEE MICRO. His work bridges theoretical advancements with practical implementations in both classical and quantum domains.
Dongwook Kim is affiliated with the Korea Advanced Institute of Science & Technology (KAIST) as a faculty member in the Department of Business and Technology Management under the College of Business. His research spans multiple domains including machine learning, robotics, signal processing, and biomedical engineering. Key contributions in Computer Vision (CNN-based semantic segmentation, 3D point cloud analysis) Significant work in Hardware Design (energy-efficient processors, neuromorphic computing) Interdisciplinary expertise in Medical Imaging (bone age assessment, retinal biomarkers) and Cybersecurity (attack detection, network analytics) Publications since 2015 demonstrate sustained innovation in AI applications , Signal Processing , and Smart City Governance . His work often integrates theoretical advances with practical implementations in real-world systems. No scientific awards or student mentorship details are explicitly documented in the provided records.
Roman Obermaisser is a Professor at the Vienna University of Technology (TU Wien), affiliated with the Cyber-Physical Systems department. His research focuses on real-time systems, system architectures, communication protocols, safety-critical systems, distributed algorithms, and fault-tolerance. He holds a PhD in Computer Science from TU Wien, awarded in 2003 for his work on integrated architectures for control paradigms. His academic contributions span over two decades, with publications in top-tier conferences and journals. Key research themes include time-triggered architectures (TTA), fault containment in embedded systems, and integration of heterogeneous communication protocols like CAN and Ethernet. He has supervised numerous graduate students, contributing to advancements in system-on-chip (SoC) design, transient-resilient architectures, and diagnostic frameworks for real-time systems. Obermaisser’s work emphasizes practical applications in automotive and industrial systems, addressing challenges such as scalability, reliability, and composability. His involvement in projects like GENESYS and DECOS highlights his role in developing cross-domain reference architectures for embedded systems. Recent efforts include evaluating ontology-based reconfiguration and COTS-based Ethernet solutions for safety-critical networks. His articles reflect a focus on real-time communication protocols, fault-tolerant design, and system integration, with applications ranging from automotive networks to smart transducers. Advising over 20 students underscores his commitment to nurturing the next generation of embedded systems researchers.
