James Barby is an Associate Professor in the Department of Electrical and Computer Engineering at the University of Waterloo. His research focuses on mixed-mode modeling, analog/mixed-signal circuits, and VLSI systems simulation. He holds a PhD from the University of Waterloo (1986) and has extensive academic credentials including a Master's (1981) and Bachelor's (1979) from Ontario institutions. PhD: University of Waterloo, 1986 MASc: University of Waterloo, 1981 BTech: Ryerson Polytechnical Institute, 1979 Dr. Barby's research interests include switched network simulation for communications/power electronics, transistor model approximations, and analysis methods for digital/analog VLSI systems. His work bridges theoretical modeling with practical circuit design applications. Selected publications span IEEE journals and conferences from 1990–1995, emphasizing mixed-mode simulation methodologies and ASIC design challenges. He has contributed to benchmarking frameworks for circuit simulators and functional analog simulators for multilevel systems. Teaching includes MTE 220 (Sensors and Instrumentation) in recent years. Currently not accepting graduate students.
Bernd Becker is a Professor of Computer Science at the University of Freiburg, where he has led the Chair of Computer Architecture until 2021. He previously served as Dean of the Faculty of Engineering (2010–2012) and held roles at institutions like the University of Tokyo (Visiting Professor, 2009/2010) and J.W. Goethe University Frankfurt (Professor of Complexity Theory, 1989–1995). His research focuses on VLSI CAD, algorithm optimization for circuit testing, and reliability of embedded systems. He has authored over 350 peer-reviewed publications and holds patents in VLSI design. Education: He earned his PhD in Computer Science from the University of Saarland (1982) and completed Habilitation (1988) under Prof. G. Hotz. His doctoral thesis addressed graph embedding, while his habilitation focused on Boolean circuit design and testing. Research Interests: Becker specializes in symbolic methods for circuit verification, formal safety protocols, and nanoelectronics testing. His work bridges academic and industrial applications, emphasizing efficient algorithms for CAD tools. Recent projects include reliability frameworks for embedded systems and advanced test methodologies for emerging nanoelectronics. Awards: Recognized as an IEEE Fellow (2008), he has received multiple teaching awards (2012–2013) and the EDA Medal (2021). He actively contributes to academic governance, serving on steering committees for conferences like DATE and ETS, and co-led the Transregional Collaborative Research Center AVACS (2003–2015). Professional Roles: He has been a member of the Scientific Directorate at Schloss Dagstuhl (2011–2019), the Board of Directors for the Centre for Security and Society (since 2010), and has organized major international symposia including ISMVL 1999 and ETS 2007.
Sarma Vrudhula is a Professor at the School of Computing and Augmented Intelligence, Arizona State University (ASU). He holds a Ph.D. in Electrical Engineering from the University of Southern California (1985). Previously, he was a professor at the University of Arizona and served as the founding director of the NSF UA/ASU Center for Low Power Electronics. He is an IEEE Fellow recognized for contributions to low-power and energy-efficient digital circuit design. Educations: Ph.D. Electrical Engineering, University of Southern California (1985) M.S. Electrical Engineering, University of Southern California (1980) Bachelor's in Mathematics (Computer Science and Mathematical Statistics), University of Waterloo, Canada (1976) Research Interests: His work focuses on design automation, energy management in digital systems, statistical analysis of process variations, threshold logic circuits, and emerging technologies. He has pioneered methodologies for low-power VLSI design, thermal management of multi-core processors, and hardware implementations of threshold logic using spintronic devices. Publications: His recent research includes scalable energy-efficient architectures for AI, in-memory computing, and reconfigurable threshold logic gates. Key topics span energy efficiency in edge computing, neuromorphic systems, and sustainable VLSI design. Awards: IEEE Fellow (2005) Best Paper Award (2008) for macro cell characterization methodology Service & Grants: He led the NSF IUCRC Consortium for Embedded Systems and served on editorial boards. His grants include projects on threshold logic synthesis, energy-aware embedded systems, and hardware acceleration for neural networks. Courses Taught: Algorithmic Foundations of CAD for Digital Systems Computer Architecture Discrete Mathematics for Engineers
Dr. Chenchen Liu is an Assistant Professor of Computer Science and Electrical Engineering at the University of Maryland, Baltimore County (UMBC). She is affiliated with the Computing Compass Laboratory and holds a Hans Fischer Fellowship at the Technical University of Munich Institute for Advanced Study (TUM-IAS) under the focus group Enabling Neuromorphic Computing for Multi-Tenant AI. Her work bridges hardware-software co-design with neuromorphic computing. Ph.D., Electrical and Computer Engineering, University of Pittsburgh (2017) M.S., Electrical and Computer Engineering, Peking University (2013) Her research focuses on high-performance computing for machine learning through novel computer architecture and system designs, brain-inspired computing, machine learning security, non-volatile memory, and VLSI design. Key areas include: Neuromorphic hardware resilience and optimization Memristor-based neural network architectures Runtime scheduling for multi-tenant AI Security in neuromorphic computing Energy-efficient memory systems Recent publications explore memristor defect tolerance, ReRAM-based CNN training efficiency, and spiking network quantization. The work emphasizes hardware-software co-design for AI acceleration. NSF Career Award (2023) Best Poster Award, Machine Learning and Systems Conference (2022) Best Paper Award, IEEE Symposium on VLSI (2014) She contributes to academic service as TPC Chair/Track Chair for DAC, GLVLSI, Cloud Summit conferences and serves as Associate Editor for IEEE Transactions on Circuits and Systems (TCAS-1) and Neurocomputing journal.
Joel Grodstein is a Lecturer in the Department of Electrical Engineering at Tufts University's College of Engineering. He holds a BSEE from Case Western Reserve University (1981) and an MSCS from the University of Utah (1986). His research spans VLSI design, computer architecture, and interdisciplinary bioelectricity studies, focusing on the intersection of hardware-software systems and biological applications. He teaches courses on real-time embedded systems, parallel computing, bioelectricity, and digital design verification. His career includes roles at Digital Equipment Corporation, Compaq, Intel, and now academia. His recent work bridges computational modeling of bioelectric networks with traditional hardware design, as seen in collaborations with Mike Levin's lab at Tufts. Courses like EE 123 (Bioelectricity) and new offerings like EE 152 (Real-Time Embedded Systems) reflect this dual focus. Publications emphasize symbolic timing analysis, CAD tools for VLSI, and bioelectric systems. He has advised no listed students but collaborates actively with industry partners (e.g., NVIDIA for EE 165). His lab work involves biophysical modeling and synthetic biology projects, as detailed in his recent bioelectricity-related papers.
Dr. Ryan Robucci is an Associate Professor in the Department of Computer Science and Electrical Engineering at the University of Maryland Baltimore County (UMBC). He holds a Ph.D. from Georgia Institute of Technology (2009) and a B.S. from UMBC (2002). His research focuses on analog/mixed-signal VLSI, hardware security, embedded systems, and biologically-inspired systems. Key areas include side-channel attack mitigation, low-power wearable devices, and FPGA-driven embedded systems. Education: Ph.D. in Electrical and Computer Engineering, Georgia Tech, 2009 M.S.E.E., Georgia Tech, 2004 B.S. in Computer Engineering, UMBC, 2002 Research Interests: Hardware Security: Side-channel resistance, PUFs, and IC fraud detection Analog/Digital Hybrid Systems: Low-power sensors and reconfigurable circuits Embedded Systems: Wearable health monitoring and FPGA design His publications span hardware security, sensor networks, and embedded systems. He leads the Covail Lab, exploring ultra-low-power analog-digital systems and assistive technologies. Teaching includes courses on digital signal processing, FPGA design, and embedded systems.
Andrew C. Singer is a Professor at the University of Illinois at Urbana-Champaign , with joint appointments in the College of Engineering (Electrical and Computer Engineering, Industrial and Enterprise Systems Engineering) and the College of Business (Business Administration). Since 1998, he has held roles including the Fox Family Endowed Professorship , Associate Dean for Innovation and Entrepreneurship (2018–present), and Director of the Technology Entrepreneur Center (2005–2017). He co-founded Intersymbol Communications, Inc. (2000, acquired by Finisar) and OceanComm (2015, underwater video communication). Education: Ph.D. in Electrical Engineering and Computer Science, MIT (1996). Research Interests span statistical signal processing , acoustic communication systems , machine learning , and low-power VLSI design , with applications in underwater acoustics, through-tissue communication, and augmented listening. His work integrates theoretical signal processing with practical hardware implementations. Recent Publications focus on acoustic communication under nonlinear conditions , low-complexity ADC design , and biomedical applications of signal processing . Articles from 2023–2020 highlight innovations in underwater navigation, face mask acoustics, and subsurface data transmission. Scientific Awards include: Hughes Aircraft Masters Fellowship Harold L. Hazen Memorial Award (1991) NSF CAREER Award (2000) Xerox Outstanding Faculty Award (2001) IEEE Fellow IEEE Signal Processing Society Distinguished Lecturer (2014) Best Paper Awards (2006, 2008) Leadership roles include Associate Editor for IEEE Transactions on Signal Processing and service on the MIT Educational Council . He directs the Coordinated Science Lab and advises on expert witness cases in audio and communication industries.
Ramtin Zand is an Assistant Professor in the Department of Computer Science and Engineering at the University of South Carolina's Molinaroli College of Engineering and Computing. His research focuses on hardware design for machine learning systems, neuromorphic computing, emerging nanoscale electronics (e.g., spintronic devices), and energy-efficient VLSI circuits. He leads the ICAS Lab, which explores reconfigurable architectures and low-power computing solutions. Education: Ph.D., Computer Engineering, University of Central Florida (2019) M.S., Electrical Engineering, Sharif University of Technology (2012) Research Interests: Dr. Zand’s work spans hardware-software co-design for AI, neuromorphic systems, and novel devices like MRAM and memristors. He emphasizes practical applications such as manufacturing anomaly detection, edge computing, and energy-efficient neural network deployment. Recent Trends in Articles: His publications emphasize hybrid PIM architectures, LLM-driven hardware design, and neuromorphic edge systems. Themes include optimizing communication efficiency, leveraging memristive crossbars, and bridging vision transformers with embedded platforms. Grants/Funding: Funded by AFRL for smart manufacturing projects ONR grants for perception systems research NSF support for in-memory computing Labs/Teams: The ICAS Lab collaborates on projects such as neuromorphic accelerators and low-power sensor systems. Recent milestones include DAC 2025 awards and CVPR 2025 demonstrations.
Dr. Chunhong Chen is a Professor in the Department of Electrical and Computer Engineering at the University of Windsor's Faculty of Engineering. He holds a PhD from Fudan University and is a P. Eng of Ontario and IEEE Senior Member. His research focuses on digital integrated circuit synthesis, VLSI CAD, high-performance low-power systems, and nanoelectronic circuit design. Education: PhD, Fudan University Recent work includes hybrid signal probability estimation methods, statistical delay modeling for nanoelectronics, and area-efficient cryptographic circuit design using hybrid SET-MOS technology. His research emphasizes practical applications in low-power systems and nanoscale device optimization. Dr. Chen's publications demonstrate expertise in both foundational theory and applied engineering solutions. He leads the Research Centre for Integrated Microsystems (RCIM), focusing on advanced microsystem integration challenges.
Ramesh Karri is a Professor and Chair of the Electrical and Computer Engineering Department at New York University Tandon School of Engineering. He co-founded the NYU Center for Cyber Security (CCS) in 2009 and co-directed it from 2016-2024. He is also a Fellow of the IEEE and has led initiatives such as the Embedded Systems Challenge (ESC), a red-blue team cybersecurity competition. Education: Ph.D. in Computer Science and Engineering, University of California, San Diego (1993) B.E. in Electrical and Computer Engineering, Andhra University (1985) Research Focus: His work centers on hardware cybersecurity, including trustworthy integrated circuits, cyber-physical systems, nano-enabled security, and biochip security. He pioneered security-aware CAD tools and has developed metrics for hardware trojan detection through initiatives like the Trust-Hub. Awards & Leadership: Recipient of the Humboldt Fellowship and NSF CAREER Award Editor-in-Chief of ACM Journal of Emerging Computing Technologies Leadership roles at IEEE conferences (ICCD, HOST, DFTS) Grants & Labs: Directs the Center for Advanced Technology in Telecommunications (CATT) and NYU CCS. His labs focus on additive manufacturing security, digital microfluidic systems, and AI-driven hardware design.
Weiping Shi is a Professor in the Department of Electrical and Computer Engineering at Texas A&M University, part of the College of Engineering. He holds a Ph.D. from the University of Illinois at Urbana-Champaign and M.S./B.S. degrees from Xian Jiaotong University. His research focuses on VLSI CAD, including physical design optimization, parasitic extraction, fault diagnosis, and electromagnetic analysis. He is particularly known for contributions to capacitance extraction algorithms, buffer insertion techniques, and power system simulation methods. Dr. Shi’s awards include the IBM Faculty Award, two Best Paper Awards at Design Automation Conferences, and election as an IEEE Fellow. His work bridges theoretical algorithm development with practical applications in semiconductor design and power systems. He maintains an active research lab and contributes to industry-relevant solutions for integrated circuit challenges. His office is located in 333K Wisenbaker Engineering Building (WEB), and he can be reached at wshi@tamu.edu . Education: Ph.D., University of Illinois at Urbana-Champaign M.S., Xian Jiaotong University B.S., Xian Jiaotong University Awards & Honors: IBM Faculty Award Best Paper Award, Design Automation Conference Best Paper Award, Asia and South Pacific Design Automation Conference IEEE Fellow Research Focus: Computer-Aided Design (CAD) of VLSI systems 3D capacitance and inductance extraction Optimal buffer insertion algorithms Electromagnetic transient simulation Defect diagnosis and process variation analysis Advancing Technology: His recent work integrates machine learning for defect classification and hierarchical algorithms for power system simulation, reflecting a commitment to both foundational research and industrial impact.
Χρ. Καβουσιανός is a Professor at the Department of Computer Engineering & Informatics, University of Patras (Polytechnic School). His research focuses on VLSI design, digital circuit testing, and test data compression. He holds a Diploma (1996) and PhD (2000) from the same department, with notable scholarships including the Maritsas Doctoral Scholarship (1999). Key roles include leading the Heraclitus II and Pythagoras II research programs as principal investigator. Collaborations include Duke University (USA) with Prof. Krishnendu Chakrabarty. Research highlights: Pioneered techniques in scan-based testing, test set embedding, and low-power testing. Over 45 publications in top journals/conferences (e.g., IEEE TCAD, DAC). Notable work includes defect-oriented testing methods and Huffman-based compression schemes. Has supervised 9 advisees across doctoral/postgraduate levels. Holds a 2010 US patent application on power switch design.
David Hung-Chang Du is a Professor and Qwest Chair Professor in the Department of Computer Science and Engineering at the University of Minnesota, Twin Cities. He served as the Center Director of the NSF multi-university I/UCRC Center of Research in Intelligent Storage (CRIS) from 2009-2021, which was sponsored by 18 companies with $3.35M industrial membership funding. Prior to that, he organized an Intelligent Storage Consortium at Digital Technology Center with industrial funding from 2002-2009. He was also a Program Director at the National Science Foundation CISE/CNS Division from March 2006 to August 2008. Dr. Du received his B.S. degree in Mathematics from National Tsing-Hua University (Taiwan) in 1974 and M.S. and Ph.D. degrees from University of Washington (Seattle) in 1980 and 1981 respectively. He joined University of Minnesota as a faculty member in 1981 and has been there for over 40 years. He has also been a visiting professor in Germany, Korea, Singapore, Hong Kong and Taiwan. Dr. Du's research focuses on intelligent storage systems, sensor/vehicular networks, and cyber physical systems. His early career work included parallel processing and database design, followed by Computer-Aided Design for VLSI circuits in the 1980s and 1990s. From the late 1980s to present, he has worked on computer networking and its related applications including multimedia computing. Starting from 2000, his research has focused on new memory and storage technologies for handling extremely large volumes of available data and long-term data preservation. His current research focuses on hyper-converging infrastructure, recognizing that the Internet has become the largest existing computer system where data collection, storage, and networking must be integrated. His recent publications (2019-2022) demonstrate continued innovation across multiple domains including DNA storage technologies, hybrid storage systems, key-value store optimization, and edge computing. These works reflect his ability to adapt to emerging technological landscapes while maintaining focus on fundamental storage and systems challenges. The publications show strong industry collaboration, particularly with major technology companies like Facebook, where his team has characterized and optimized key database workloads. IEEE Fellow (since 1998) Fellow of the Minnesota Supercomputer Institute ACM Recognition of Service Award (2013) IEEE Certificate of Appreciation (2012, 2007) NSF Director's Award for Collaborative Integration (2008) Best Paper Award, International Conference on Internet of Vehicles (2015) Best Paper Award, International Conference on Computer Design (1998) Dr. Du has been highly active in professional service, serving as Editor of IEEE Transactions on Computers (1993-1998), member of several editorial boards, and holding leadership positions in numerous conferences including General Chair for IEEE Security and Privacy Symposium (2009), Program Committee Co-Chair for International Conference on Parallel Processing (2009), and General Chair for IEEE International Conference on Distributed Computing Systems (2010-2011). He has graduated 67 Ph.D. students (58 as single adviser and 9 jointly supervised) and 109 Master's students over his 40+ year career. His research has been supported by substantial grants from NSF, industry partners, and other funding sources totaling millions of dollars.
Maciej Ciesielski is a Professor in the Department of Electrical and Computer Engineering at the University of Massachusetts Amherst and serves as Associate Department Head. His research focuses on Computer Aided Design (CAD) for VLSI circuits , Logic synthesis and optimization , and Formal verification of integrated circuits . Education : PhD in Electrical Engineering (1983, University of Rochester), MS in Electrical Engineering (1974, Warsaw Technical University). He leads research in computing and cybersecurity, with a strong emphasis on computer engineering. His work bridges theoretical and applied advancements in digital system design. Scientific Awards and Affiliations : IEEE Fellow (2020) Residential First-Year Experience Student Choice Award (2013) Doctorate Honoris Causa, Universite de Bretagne Sud (2008) Institute of Electrical and Electronics Engineers (IEEE)
Dr. Irina Ilioaea serves as an Assistant Professor in the Department of Mathematics at Louisiana State University Shreveport (LSUS) within the College of Arts and Science, joining the institution in 2020 after completing her doctoral studies. Her academic foundation bridges theoretical mathematics with practical engineering applications. Her educational credentials include: PhD in Mathematics from Georgia State University (2020) MS in Algebra from University of Bucharest BS in Mathematics from University of Bucharest Her research centers on Commutative Algebra , Combinatorial Commutative Algebra , and Computational Algebra , with specialized focus on tight closure theory and Frobenius complexity theory . These investigations create critical linkages between abstract algebraic structures and real-world problems in digital circuit design and computational verification systems. Analysis of her publications reveals consistent interdisciplinary collaboration between mathematics and computer engineering, particularly in developing algebraic solutions for VLSI design challenges and constraint programming frameworks through finite field applications. Her scholarly contributions have been recognized through: Mathematics Achievement Award (2019) from Georgia State University Fred Massey Endowed Award (2018) for research and teaching excellence Dr. Ilioaea currently teaches undergraduate mathematics courses including Math 121L (Problem Solving Lab), Math 150 (Precalculus), Math 201 (Discrete Mathematics), and Math 407/607 (College Geometry) with structured office hours for student engagement. No public information indicates research grants or graduate student advising activities.
