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Antonia ZhaiView profile

Associate Professor

• Compiler Optimizations
• Computer Architecture
• Parallel Processing
• +4 more

Antonia Zhai is an Associate Professor in the Department of Computer Science and Engineering at the University of Minnesota. She holds a Ph.D. in Computer Science from Carnegie Mellon University (2005), an M.A.Sc. in Computer Engineering from the University of Toronto (1998), and a B.A.Sc. in Computer Engineering from the University of Toronto (1996). Her office is located at 6-205 Kenneth H. Keller Hall, Minneapolis, MN. Her research focuses on developing novel compiler optimizations and computer architecture features to enhance both performance and non-performance aspects of computing systems. Key interests include: Thread-level speculation for parallel processing Multicore architecture optimization Hardware/compiler co-design for security and reliability Dynamic performance tuning in heterogeneous systems High-speed network packet processing architectures Her publications demonstrate sustained focus on parallel computing, compiler optimizations, and hardware security, with recent work expanding into network function virtualization and cache-side channel attack detection. She leads the High-Performance Computing and Compilers (HPCC) group and organizes the weekly HPCC seminar series focused on architectures and compilers. She has advised 12+ graduate students including 8 PhD graduates now at companies like AMD, NVIDIA, and Oracle. Significant research grants include: NFLambda: NFV Framework (NSF 2021-2025) Dynamic Binary Translation (NSF 2015-2019) In Vivo Software Monitoring (NSF 2009-2014) Embedded Fault Detection (NSF 2009-2014)

Nima HonarmandView profile

Assistant Professor

• Computer Architecture
• Parallel Computing
• Operating Systems
• +3 more

Nima Honarmand is an Assistant Professor in the Department of Computer Science at Stony Brook University, where he co-directs the Computer Architecture Stony Brook (COMPAS) Lab . His research focuses on computer system design , particularly parallel computer architecture and operating systems . Education : Ph.D. in Computer Science from University of Illinois at Urbana-Champaign under Josep Torrellas. His work addresses challenges in deterministic replay of parallel programs to simplify debugging on multi-processor systems. Current research explores memory fencing, consistency models, and architectural extensions for reproducibility. Recent publications span conferences like ASPLOS, ISCA, PACT, and POPL, with emphasis on parallelism constraints , memory hierarchy optimization , and fault-tolerant systems . Awards include Best Paper at PACT 2011 and Best Paper Candidate at VTS 2007 . Teaching : Courses include Computer Architecture (CSE 502) and Operating Systems (CSE 306/CSE 506). Email : nhonarmand@cs.stonybrook.edu

• Computer Architecture
• Memory Systems
• Multicore Architectures
• +3 more

Georgios Keramidas is an Assistant Professor in Computer Architecture at the Department of Informatics, Aristotle University of Thessaloniki . He also holds an Adjunct Professor position at the Hellenic Open University and collaborates with institutions like the University of Peloponnese and University of Patras . Research Interests : Computer Architecture, Memory Systems, Multicore/GPU Design, Low-Power Techniques, Fault-Tolerant Systems His work focuses on cache optimization , energy-efficient computing , and security-aware memory design . Key contributions include DVFS frameworks , reuse-distance prediction , and non-deterministic cache mechanisms . Recent article trends highlight innovations in computation-in-memory , IoT platform components , and security/low-power co-design . Patents on image compression and GPU optimization reflect practical applications of his research. Academic Network : Collaborates with institutions including University of Patras , University of Manchester , and TU Dresden

• Computer Architecture
• Distributed Systems
• Cloud Computing
• +3 more

Javier Picorel is a former researcher at École Polytechnique Fédérale de Lausanne (EPFL), affiliated with the Parallel Systems Architecture Lab (Parsa). His work focuses on computer architecture, distributed systems, and cloud computing, with an emphasis on optimizing storage systems, near-data processing, and high-performance computing. Picorel has contributed to advancements in scalable serverless computing, secure data center architectures, and accelerator design. His research interests include storage-class memory hierarchies, virtual machine performance optimization, and software-defined systems. Key projects include BlockNDP for block-storage acceleration, IndiLog for stateful serverless systems, and SPARTA for accelerator address translation. He has collaborated extensively with the Parsa group and published widely in top conferences such as ISCA, MICRO, and PACT.

• Computer Architecture
• GPU Systems
• Accelerators for Machine Learning
• +4 more

Jose Luis Abellan Miguel is a Ramón y Cajal Fellow and Tenure-Track Associate Professor at the University of Murcia's Department of Computer Engineering and Technology. He leads the EcoArTech team and is a European R3 researcher. Previously, he held roles at the University of Ferrara, Boston University, and Universidad Católica de Murcia. His research focuses on GPU architectures, accelerators for machine learning, and privacy-preserving computing, particularly Fully Homomorphic Encryption (FHE). He has authored over 70 peer-reviewed publications and contributed to conferences like ISCA, HPCA, and MICRO. Education: Bachelor's, Master's, and PhD in Computer Science and Engineering (University of Murcia, 2007–2012) Research Interests: Abellan's work emphasizes architectural enhancements for GPU systems, customized accelerators for ML and FHE, and efficient synchronization/communication in many-core architectures. His contributions include tools like MGPU-Sim and STONNE for simulation, and frameworks like FIDESlib for FHE on GPUs. Recognition: HiPEAC Paper Awards (2011, 2019–2024) Top Picks in Hardware and Embedded Security 2024 European R3 Certificate (2024) Editorial roles at ACM TACO and Frontiers in Electronics Grants & Leadership: Recipient of a Ramón y Cajal fellowship and a Consolidación Investigadora grant. He chairs sessions at conferences like ISPASS and serves on TPCs for venues including DATE, HPCA, and MICRO. His lab collaborates with institutions like Georgia Tech, Northeastern University, and Intel. Labs/Teams: He leads the EcoArTech team, focusing on next-gen computing systems via architectural simulators. Collaborators include researchers from MIT, Boston University, and industry partners like NVIDIA and Intel.

• Distributed Systems
• Networks
• Security
• +5 more

Patrick Thomas Eugster is a Full Professor of Computer Science at the Università della Svizzera italiana (USI), leading the Software Systems (SWYSTEMS) group within the Computer Systems Institute, which he co-founded. Previously, he held faculty positions at Purdue University (2005-2016) and TU Darmstadt (2014-2017), with a visiting role at MIT (2012/2013). His research focuses on distributed systems, networking, security, and programming languages, with over 160 publications and significant industry collaborations with companies like Amazon, Google, and Facebook. Education: He holds an M.S. (1998) and Ph.D. (2001) in Computer Science from École Polytechnique Fédérale de Lausanne (EPFL). Research Interests: His work addresses distributed systems challenges such as fault-tolerance, security, and efficient resource management. Recent topics include datacenter reliability, quantum network verification, and confidential computing. His team explores intersections between systems, languages, and networks to build robust and secure distributed applications. Publications: Recent work spans topics like failure detection in datacenters, formal verification of systems, and network congestion control. Key venues include USENIX ATC, ACM SIGMETRICS, IEEE Network, and TACAS. His 2025 work on failure detection and TCAM encoding exemplifies contributions to system resilience and hardware optimization. Awards: Jean-Claude Laprie Award (2025), TACAS Best Paper (2025), ERC Consolidator Grant (2014), NSF CAREER Award (2007). Advising & Grants: Supervised over 20 PhD and postdoctoral researchers. Active grants include EU Horizon Europe CloudStars, Swiss National Science Foundation, and industry partnerships with Cisco and SAP. Labs & Teams: Directs the SWYSTEMS group, collaborating on projects like secure cloud analytics, quantum network verification, and datacenter monitoring. Former students hold roles at universities, tech firms, and startups.

Veljko MilutinovicView profile

Professor

• Microprocessor architecture
• VLSI design
• Data mining
• +9 more

Veljko Milutinovic is a Full Professor at the School of Electrical Engineering, University of Belgrade since 1990. He has also held academic positions at Purdue University (1982-1989) and consulted globally for institutions like IEEE and ACM. Current role: Computer Area Director, teaching VLSI, Data Mining, and E-Business Previous roles: Tenure Track Assistant Professor at Purdue University International collaborations: EU FP7 projects, Raiffeisen Bank, Wall Street Journal His research spans microprocessor architecture , VLSI design , data mining , and semantic web , focusing on energy-efficient architectures and e-business infrastructure. He pioneered DARPA's 200MHz GaAs RISC microprocessor and 4096-node systolic arrays. Recent work trends include: Technical and semantic interoperability in e-government Customer satisfaction accelerators in e-commerce 3D semantic web visualization Data mining for inverse engineering Academic-industry co-design methods Global university collaboration frameworks Scientific awards include: IEEE Life Fellow (2003) Foreign Member, Montenegrin Academy (2018) IPSI Awards (2007-2010) for eGov projects Best Method papers ranked #1 in Google search Supervised PhD students at Purdue, Belgrade, and Valencia Universities, with significant contributions to cache coherence, GaAs processors, and mobile network security. His publications (over 100 SCI papers) have been cited over 4000 times on Google Scholar.

Christian DietrichView profile

Professor

• Operating Systems
• Real-Time Systems
• Embedded Systems
• +5 more

Christian Dietrich is a Professor at Technische Universität Braunschweig, specializing in operating systems, real-time systems, and software dependability. Previously affiliated with Friedrich-Alexander-Universität Erlangen-Nürnberg and Leibniz Universität Hannover, he leads the Systems Research and Architecture (SRA) group. His research focuses on dependable embedded operating systems, fault tolerance, static analysis, and compiler optimization. He has contributed to projects like dOSEK, cHash, and MELF, addressing challenges in real-time scheduling, redundancy reduction, and variability management in system software. Education: PhD in Computer Science from Leibniz Universität Hannover (2019). Research Interests: Embedded systems dependability, real-time OS design, static/dynamic analysis, fault injection, and compiler-driven optimization. His work bridges theory and practice, with applications in automotive and safety-critical systems. Recent Work: Recent articles explore compiler caching efficiency (IRHash), memory management (HyperAlloc), and fault-space pruning for hardware fault injection. His work on cHash reduced redundant compilations by 80%, earning a USENIX ATC Best Paper Award. Awards: ECRTS 2018 Outstanding Paper, RTAS 2015 Best Paper, and multiple teaching accolades. Supervised over 30 theses, including topics like live patching, fault injection frameworks, and stack-sharing mechanisms. Lab/Team: Heads the SRA group, collaborating on projects like AHA (Hardware Abstraction), CLASSY-FI (fault injection), and CADOS (RTOS variability management). Active in conferences like OSDI, EuroSys, and RTSS.

• Transactional Memory
• Speculative Execution
• Cache Coherence
• +3 more

James R. Goodman is a Professor in the Department of Electrical and Computer Engineering at the University of Wisconsin-Madison, affiliated with the College of Engineering. His research focuses on transactional memory, speculative execution, cache coherence, and parallel computing. University: University of Wisconsin-Madison School: College of Engineering Department: Electrical and Computer Engineering Email: goodman@cs.wisc.edu Research Interests include transactional memory for concurrent programming, speculative execution techniques, and cache coherence protocols. He has contributed to advancements in parallel computing architectures and distributed systems. Scientific Awards ACM Fellow (2011) Eckert-Mauchly Award Recipient (2013) Publications span topics from computer architecture to interdisciplinary studies in biotechnology and history. His recent work emphasizes concurrency, memory systems, and high-performance computing. Advising and Contributions include mentoring students and leading research initiatives. He has received grants for projects in computer architecture and speculative execution technologies.

Carlos Molina ClementeView profile

Associate Professor

• Computer Architecture
• Mobile and Sensor Networks
• Cloud Computing
• +8 more

Carlos Molina Clemente is an Associate Professor of Computer Architecture at Rovira i Virgili University in Tarragona, Spain. He holds a M.Sc. in Computer Engineering (Universitat Politècnica de Catalunya, 1996) and a Ph.D. in Computer Science (UPC, 2005). His research focuses on Computer Architecture, Mobile/Sensor Networks, and Cloud Computing. He leads the Cloudlab research group and coordinates initiatives like GTDAWIN and BIOGEI. Key research areas include multicore scheduling, LoRaWAN protocols, LIDAR data analysis, and serverless computing. He has published over 50 articles in top-tier conferences/journals and supervised three doctoral theses. His work spans projects on cache architectures, real-time systems, and educational multicomputing solutions. Affiliations include the Department of Computer Engineering and Mathematics (DEIM) at URV, with offices at Campus Sescelades (Avinguda Països Catalans 26, Tarragona). Research highlights include contributions to non-uniform cache policies, predictive mobile network algorithms, and energy-efficient sensor networks.

Jianhui YueView profile

Assistant Professor

• Computer Architecture
• Operating Systems
• System Optimization of Big Data Processing
• +3 more

Jianhui Yue is an Assistant Professor in the Department of Computer Science at Michigan Technological University. His research focuses on computer architecture, operating systems, and system optimization for big data processing. He specializes in memory systems, persistent memory technologies, and hardware acceleration for graph processing and machine learning workloads. His work addresses challenges in optimizing performance, energy efficiency, and reliability in modern computing systems. Key research areas include hybrid memory architectures, in-storage accelerators (e.g., FlashGNN), and crash consistency mechanisms for non-volatile memory. His publications emphasize innovations in cache optimization, NAND flash management, and graph algorithms for dynamic data mining. His recent work (e.g., Cheetah, P3DC) highlights advancements in reducing latency and improving scalability in high-performance computing environments. Dr. Yue’s contributions span hardware-software co-design, with a focus on practical applications of computer architecture principles to real-world systems. His research bridges theoretical concepts with deployable solutions, addressing critical bottlenecks in data-centric computing.

Aakash TyagiView profile

Professor

• Hardware Verification
• Secure Computing
• High Performance Computing Architectures
• +3 more

Aakash Tyagi is a Professor of Practice in Computer Science & Engineering at Texas A&M University, affiliated with the Multidisciplinary Engineering program. His roles include academic leadership, teaching, and industry collaboration. He holds a Ph.D. in Computer Engineering from the University of Louisiana (1993), an M.S. in Electrical and Computer Engineering (1989), and a B.S. in Electronics & Communication from Kamla Nehru Institute of Technology, India (1987). His research focuses on hardware verification, secure computing, and high-performance computing architectures. He has over two decades of industry experience at Intel, contributing to CPU design and managing projects like the Knights Landing processor. Teaching interests include computer architecture, data structures, and project management. His publications emphasize innovative applications of machine learning in hardware verification, formal methods for processor security, and optimization techniques for EDA tools. Notable works include HyPFuzz (2023), MinBLoG (2024), and Spec2Assertion (2025), advancing automated verification and vulnerability detection. Tyagi has received over 15 teaching and service awards from Texas A&M, including multiple Distinguished Achievement Awards (2015–2024) and grants for instructional innovation. He actively bridges academia and industry through research partnerships and mentorship.

Andrey I. LyakhovView profile

Professor

• Wireless Networks
• IEEE 802.11 Protocol
• Network Performance Analysis
• +3 more

Andrey I. Lyakhov is a Professor and Doctor of Computer Science at the Institute for Information Transmission Problems of the Russian Academy of Sciences. He serves as the Head of Laboratory №18 and has been active since 1959. His research focuses on wireless networks, particularly IEEE 802.11 and 802.16 protocols. Position: Laboratory Chief Affiliation: Institute for Information Transmission Problems, Russian Academy of Sciences Research Interests: Wireless Networks, MAC Protocol Analysis, Network Performance, Distributed Control, Multicast QoS, Channel Assignment His work includes analytical modeling of data transmission, beaconing in mesh networks, and studies on network unfairness and congestion. He has contributed to patents in wireless sensor networks and piconet beacon management. Notable publications span wireless LANs, WiMAX, and sensor network optimization. Lyakhov's research has involved collaborations with international conferences and journals, focusing on throughput estimation, channel contention, and quality of service in wireless systems. Recent publications include studies on bandwidth piggybacking (2010), intra-flow interference in mesh networks (2010), and multicast QoS support in WLANs (2007). Earlier works from 1983-2008 cover foundational topics in queueing theory, cache efficiency, and distributed control systems.

Philippe CiblatView profile

Professor

• Statistical Signal Processing
• Digital Communications
• Resource Allocation
• +6 more

Philippe Ciblat is a Full Professor at Institut Polytechnique de Paris , affiliated with the Communications and Electronics Department (Comelec) and the Information Processing and Communication Laboratory (LTCI) . He obtained his Engineering Degree from Télécom Paris (1996), DEA in Automatic Control from Université Paris-Saclay (1996), PhD from Université Gustave Eiffel (2000), and HDR diploma (2007). After a postdoctoral fellowship at Université de Louvain (2001), he joined Télécom Paris as Associate Professor in 2001 and was promoted to Full Professor in 2011. Research Activities: His research spans three core areas: Statistical/Digital Signal Processing (blind equalization, frequency estimation, distributed estimation) Signal Processing for Communications (OFDM synchronization, UWB localization, cooperative communications) Resource Allocation (HARQ optimization, power allocation, distributed networks) Scientific Leadership: He has served as Associate Editor for IEEE Transactions on Signal and Information Processing over Networks (2018-2022), Senior Area Editor for IEEE Transactions on Signal Processing (2011-2012), and held editorial roles in IEEE Communications Letters and Transactions on Signal Processing. He chairs technical committees at EUSIPCO, SPAWC, and IEEE conferences. PhD Supervision: He has mentored 23 PhD students, including Current: Nils Reynaud (deep reinforcement learning for wind farms), Abdelghani Ghanem (multi-agent driving behavior), Sylvain Nerondat (deep reinforcement learning for ad hoc networks) Former: Yue Bi (distributed computing), Hakim Hafidi (robust graph ML), Arthur Louchart (nonlinear satellite systems), Vincent Corlay (lattice decoding), Alix May (optical network monitoring) Grants & Collaborations: Currently leads projects with TotalEnergies (2025-2028), PEPR Twinfarms (2025-2028), and ANR SUCCEN (2025-2027). Formerly secured ANR, Marie-Curie, and CIFRE grants with Thales, Nokia, Mitsubishi, and Huawei. Labs & Teams: Affiliated with LTCI (Signal, Statistics and Learning team) and has conducted sabbaticals at Technische Universität Berlin, Rutgers University, and Universidad Nacional de Colombia. Actively participates in international conferences as TPC member and reviewer.

• Parallel Computing
• Programming Models
• System Software
• +3 more

Mats Brorsson is a Professor at the Division of Software and Computer Systems , KTH Royal Institute of Technology. His research spans multiple areas of computer architecture and parallel computing, with a focus on system software, energy-aware architectures, and performance debugging tools. He is actively involved in projects like the PaPP ARTEMIS collaboration and coordinates the KTH-SICS Scalable Computing Systems initiative. Research Interests : Mats Brorsson's work primarily addresses parallel computing , task-based programming models (e.g., OpenMP), and energy-efficient computer architectures . He has made significant contributions to NUMA system optimization , work-stealing schedulers , and runtime systems for high-performance computing. Professional Activities : Mats Brorsson serves as coordinator for the PaPP ARTEMIS project and is a member of the KTH-SICS Collaboration in Scalable Computing Systems. His publications reflect deep engagement with task scheduling , cache coherence protocols , and adaptive resource management for parallel systems.