Dustin Richmond is an Assistant Professor in the Department of Computer Science and Engineering at the Baskin School of Engineering, University of California, Santa Cruz. His work focuses on secure, usable hardware systems with applications in FPGA acceleration, RISC-V architectures, and side-channel analysis. Email: drichmond@ucsc Office: Engineering 2, Room 221 Research Interests: Secure hardware systems FPGA-based computing Manycore processors High-level synthesis Side-channel vulnerabilities Notable Article Trends: Recent publications emphasize cloud FPGA security, manycore design optimization, and hardware security. Earlier works focus on RISC-V acceleration, OpenCL compiler enhancements, and heterogeneous computing systems. GitHub Contributions: Maintains open-source projects like RISC-V-On-PYNQ and PYNQ-HLS, addressing FPGA programming challenges and RISC-V integration. Active in resolving community issues related to toolchain compatibility and hardware-software interfaces.
Francisco J. Andújar Muñoz is an Associate Professor at the University of Valladolid in the Department of Computer Science since January 2024. His career spans multiple institutions including Universidad de Castilla-La Mancha (2008-2015) and Universitat Politècnica de València (2017-2018), with academic roles ranging from Research Assistant to Juan de la Cierva Formación Researcher. PhD in Advanced Computer Science Technologies (2011-2015) MsC in Advanced Computer Science Technologies (2010-2011) Computer Science Engineering (2008-2010) Computer Science Technical Engineering (2004-2008) His research focuses on high-performance interconnection networks , with significant contributions to quality-of-service mechanisms, energy-efficient network topologies, and heterogeneous programming optimization. He maintains the open-source VEF Traces framework for network workload modeling. Recent publications (2023-2025) demonstrate expertise in FPGA high-level synthesis portability, SYCL-based GPU optimization, and machine learning applications for Twitch streaming analysis. His work combines theoretical network design with practical implementations in the Journal of Supercomputing and IEEE Transactions on Computers .
John van de Wetering is an Assistant Professor at the Theoretical Computer Science group of the Informatics Institute at the University of Amsterdam . He works with the QuSoft research center and co-develops the PyZX open-source quantum compiler. His research spans quantum computation, diagrammatic reasoning, and quantum foundations. Education: PhD in Computer Science (2022, Radboud University) Research: Focuses on ZX-calculus for quantum circuit optimization, verification, and simulation. Explores quantum foundations through algebraic and compositional methods. Recent work includes quantum circuit optimization with AlphaTensor, completeness proofs for ZH-calculus, and scalable spider nets for transversal non-Clifford gates. He directs the new Master's program in Quantum Computer Science at UvA and co-authored the book Picturing Quantum Software . Notable collaborations include PyZX development and EU Gender Equality Working Group participation. Supervision includes current PhD students Lia Yeh (Oxford), Sarah Li (UvA), and Marc Farreras (Leiden). Former students include Boldizsár Poór (Quantinuum), Julien Codsi (Princeton), and Yanbin Chen (TUM). Tools & Outreach: Maintains the ZX-calculus Wikipedia page, co-lectured courses like Quantum Processes and Computation , and develops the ZX-calculus educational website. Organized QPL2026 conference and contributed to open-access journal Quantum .
Dr. Irina Zeleneva is an Associate Professor at the Department of Computer Systems and Networks, Faculty of Computer Science and Technologies, Zaporizhzhia Polytechnic National University. With a Ph.D. in Computers, Systems, and Networks, she has 15+ years of academic experience since joining the university in 2003. Specializes in FPGA-based digital system design Focuses on hardware acceleration and reliability optimization Teaches advanced topics in microprocessor architecture Her research includes: Development of energy-efficient FPGA systems Hardware-software co-design Neural network text classification accelerators Reliable embedded control architectures Recent publications analyze FPGA implementation of floating-point multipliers, finite state machines with elementary state chains, and AI-enhanced educational frameworks . Her work frequently appears in international conferences like IDAACS and PIC S&T, with multiple Scopus/WoS indexed articles. Dr. Zeleneva's contributions: Co-author of two monographs on FPGA acceleration PI in multiple university research projects Active participant in annual "Week of Science" conferences
Rolf Drechsler is a Full Professor and Head of the Group of Computer Architecture at the University of Bremen's Institute of Computer Science since 2001, and Director of the Cyber-Physical Systems Group at DFKI Bremen since 2011. He holds an adjunct professorship at the Indian Statistical Institute and has been affiliated with Duke University. Education: Diploma (1992) and Dr. phil. nat. (1995) in Computer Science from Goethe University Frankfurt Academic Leadership: Dean of Mathematics and Computer Science Faculty (2018-2025), Vice Rector for Research (2008-2013) His research focuses on formal verification , RISC-V architectures , and quantum/in-memory computing . Recent work explores LLM integration in hardware testing and polynomial-based verification techniques. Publications from 2024-2025 span IEEE Transactions , DATE , and DAC , emphasizing automated verification , quantum circuit mapping , and LLM-driven testbench generation . Scientific Awards IEEE/ACM Best Paper Awards (2013, 2018) Berninghausen-Preis for Innovative Teaching (2018) IEEE Fellow (2015) Founder Award for Solvertec (2013) He has served on program committees for DAC, ICCAD, DATE, and founded graduate schools in Embedded Systems and System Design under Germany's Excellence Initiative.
Adriano José Conceição Tavares is an Associate Professor at the School of Engineering, University of Minho, Portugal. He serves as a Senior Researcher at Centro ALGORITMI, where he is affiliated with both the IE R&D Group and the ESRG R&D Lab. His academic credentials include a PhD in Industrial Electronics from the University of Minho, a Master of Science in Information Technology from the University of Coimbra, and an undergraduate degree in Informatics from the University of Coimbra. Professor Tavares specializes in embedded systems with particular expertise in: Embedded systems modeling and design System software design System-on-chip design Real-time operating systems Hardware acceleration and FPGA design Virtualization for embedded systems IoT frameworks and protocols His publication record demonstrates a strong research trajectory in hardware-software co-design, with recent work showing an increasing integration of machine learning techniques into embedded systems. His publications span theoretical frameworks to practical implementations addressing real-time performance, resource constraints, and security challenges. Among his scholarly metrics: h-index of 18 126 publications with 1148 citations 20 publications in Q1/Q2 journals Author of a book on microcontroller programming Professor Tavares has supervised students including Miguel Ângelo Fernandes Silva and has established international collaborations through the Erasmus Program with institutions in China, Iran, Thailand, Jordan, and Cambodia. He teaches advanced courses on embedded and real-time systems modeling, compiler design, system-on-chip design, real-time operating system design, and advanced computer architectures at University of Minho.
Jan-Matthias Braun is an Associate Professor at the Maersk Mc-Kinney Moller Institute, University of Southern Denmark, specializing in Applied AI and Data Science. His research bridges artificial intelligence, robotics, and medical device engineering. Current projects focus on explainable AI integration in colon capsule endoscopy Development of real-time FPGA-based systems for colorectal diagnostics Biomechanical modeling for adaptive orthotic devices His work emphasizes cross-disciplinary applications of machine learning in healthcare, particularly for gastrointestinal disease detection and assistive robotics. Publications demonstrate expertise in deep neural networks, hardware acceleration, and smart environment control systems. Teaching responsibilities include: Advanced cybersecurity courses Deep learning applications in epilepsy detection Mentorship in capsule endoscopy image analysis
Xiaokang Qiu is an Associate Professor at the Elmore Family School of Electrical and Computer Engineering , Purdue University , with a Ph.D. in Computer Science from University of Illinois at Urbana-Champaign (2013). His research focuses on Programming Languages and Software Engineering , particularly theories, algorithms, and tools for program synthesis, verification, and logic-based analysis. Research Interests His work addresses: Formal methods for heap-manipulating programs using separation logic Automated deduction and decision procedures for data structures Syntax-guided synthesis of concurrent and bit-vector programs Integration of machine learning with formal verification Scalable verification of hardware memory consistency Network protocol optimization through program synthesis Recent Publications Recent work includes PLDI 2025 on concurrent string synthesis, POPL 2024 on bit-vector synthesis, and POPL 2023 on comparative network design. His tools like STRAND and VCDryad enable automated verification of complex data-structure manipulations. Grants & Awards Recipient of: NSF SHF Small Award (2024, co-PI, $593K) NSF FMitF Award (2023, PI, $750K) Tenure at Purdue (2023) Professional Service Active in program committees for PLDI , POPL , CAV , and ATVA conferences. Developed tools like DryadSynth (PLDI 2020), ImpSynt (OOPSLA 2017), and JSketch (ESEC/FSE 2015).
Amirreza Yousefzadeh is an Assistant Professor specializing in computer architecture design for embedded systems. His research focuses on hardware acceleration for artificial intelligence, particularly in energy-efficient neuromorphic computing and edge AI applications. Research Interests Neuromorphic computing architectures Event-driven AI hardware Sparsity exploitation in neural networks Embedded vision systems Digital circuit design for AI Research Trends Recent work (2024-2025) demonstrates expertise in spiking neural networks (SNNs), activation sparsity, and hardware-software co-design for neuromorphic processors. Key areas include object detection, energy efficiency optimization, and digital implementations of synaptic delays. Technical Contributions Developed SENMap for multi-objective data-flow mapping Created SENSIM simulator for multi-core neuromorphic systems Investigated 3D stacking for memory-dominated architectures Explored temporal sparsity in event-based processing
Dr. Johannes Pfau serves as a Scientific Assistant at the Institute for Information Processing Technology (ITIV) within Karlsruhe Institute of Technology (KIT), working in Prof. Becker's research group. His position combines postdoctoral research in advanced FPGA architectures with teaching responsibilities including System-on-Chip internships and academic advising for specialized engineering tracks. Education: Doctorate (Dissertation) in Electrical Engineering and Information Technology, Karlsruhe Institute of Technology, 2024 Research Interests: Pfau's work centers on reconfigurable computing with three interconnected pillars: (1) Next-generation FPGA architectures using emerging technologies like RFETs that require fundamental toolchain redesigns; (2) Digital beamforming systems for satellite Earth observation that replace analog processing with FPGA-based solutions to enable on-orbit data compression; and (3) High-throughput data acquisition systems for 6G prototyping handling multi-100Gbps streams through RFSoC platforms. His research bridges semiconductor physics, hardware architecture, and practical applications in communications and remote sensing. Publication Trends: Pfau's 15 most recent publications (2021-2024) reveal a strong focus on practical FPGA implementations addressing real-world constraints. His work increasingly integrates power management (7 papers), 6G infrastructure (5 papers), and novel semiconductor technologies (4 papers), with a clear trajectory toward hardware solutions for satellite communications and next-generation wireless systems. The research demonstrates consistent progression from architectural innovations (RFET, V-FPGAs) to applied systems (beamforming, 6G testbeds). Advising and Mentorship: Pfau maintains an active student supervision portfolio with documented guidance of 7+ Bachelor's and Master's theses since 2021. His projects emphasize hands-on hardware development, spanning power management techniques, beamforming filter design, and prosthetic control systems. The academic advising role for specializations 13 and 21 positions him at the intersection of computer science and electrical engineering education. Research Context: As a core member of Prof. Becker's group at ITIV, Pfau contributes to KIT's leadership in reconfigurable systems research. The group maintains strong industry connections through 6G initiatives and satellite technology development, with Pfau's work directly supporting German and European efforts in secure communications infrastructure and Earth observation systems.
Adam Chlipala is a Professor at the Massachusetts Institute of Technology working at the intersection of programming languages, formal methods, and computer systems. His research focuses on building practical verified systems with end-to-end machine-checked proofs, particularly using the Coq proof assistant. His educational background includes a Computer Science undergraduate degree from Carnegie Mellon University (2003) and a PhD in Computer Science from the University of California, Berkeley (2007). Following a postdoctoral position at Harvard University through 2011, he joined MIT as faculty. Chlipala's research spans multiple domains with strong emphasis on dependent types , verified compilation , and hardware-software co-verification . His work consistently bridges theoretical foundations with practical implementation, as evidenced by his development of the Ur/Web programming language and his focus on creating clean-slate hardware-software stacks with formal guarantees. Key research thrusts include cryptographic constant-time verification, side-channel security, and verified tensor compilation. His recent publications (2020-2025) reveal a clear trajectory toward increasingly complex verified systems, with growing emphasis on hardware-software integration, cryptographic implementations, and performance-critical applications. The work consistently leverages Coq for machine-checked proofs while addressing real-world constraints like timing channels and hardware interfaces. Chlipala is the author of the influential textbook Certified Programming with Dependent Types , which serves as a primary educational resource for Coq at numerous institutions worldwide. His professional activities include significant service to the PL community through program committees for major conferences including PLDI, POPL, ICFP, and CPP. He leads research initiatives connecting hardware and software verification, most notably through the DeepSpec project which aims to build fully verified computing stacks. His current work focuses on practical applications of dependent types for business applications through Ur/Web and verified cryptographic implementations.
Mayur Naik is the Misra Family Professor in the Department of Computer and Information Science at the University of Pennsylvania's School of Engineering and Applied Science. He holds office in Room 642B, Amy Gutmann Hall and maintains an active research program focused on the intersection of programming languages and artificial intelligence. Before joining UPenn, he was faculty at Georgia Institute of Technology and a researcher at Intel Labs, Berkeley. Naik received his PhD in Computer Science from Stanford University in 2008 under Alex Aiken, a Masters from Purdue University in 2003 under Jens Palsberg, and a Bachelors from BITS Pilani in 1999. He grew up in Goa, India. His primary research interests center around neurosymbolic programming, which combines symbolic reasoning with machine learning to create more accurate, interpretable, and domain-aware AI systems. His group develops language design, learning algorithms, and compiler optimizations in this space, with their most mature effort being the Scallop neurosymbolic programming language and compiler toolchain. He also conducts research in trustworthy AI for healthcare applications and AI-enabled programming tools that improve programmer productivity. Analysis of his recent publications shows a strong trend toward neurosymbolic programming frameworks (Scallop, TorchQL), LLM-assisted program analysis (IRIS), and applications of these techniques to security, healthcare, and computer vision. His work consistently bridges theoretical foundations with practical implementations, often releasing open-source systems. Misra Family Professor (endowed chair, effective July 2024) Multiple distinguished paper awards (PLDI 2019, FSE 2015, PLDI 2014) Test-of-Time Paper Awards (FSE 2013, FSE 2012, EuroSys 2011) His student Elizabeth Dinella won the 2025 ACM SIGSOFT Outstanding Dissertation award Naik has advised numerous PhD students who have gone on to faculty positions at top institutions including Peking University, University of Toronto, Ashoka University, Bryn Mawr College, and Johns Hopkins University. His research is supported by grants from NSF, Google, Amazon, and other industry partners. His lab maintains active collaborations with clinicians and bioinformatics researchers to apply neurosymbolic programming to healthcare problems. His research group, which includes current PhD students and postdocs, develops practical open-source systems and applies them to diverse domains including computer vision, cybersecurity, medicine, and bioinformatics. The group maintains strong industry connections with Google, Microsoft, Amazon, and other tech companies.
Rachit Nigam serves as an Assistant Professor in the Department of Electrical Engineering and Computer Science (EECS) at the Massachusetts Institute of Technology's School of Engineering. He leads the FLAME Lab, focusing on the intersection of programming languages and computer architecture. His research profile demonstrates significant involvement in major programming languages conferences including PLDI, SPLASH, and ICFP, where he has served in various committee roles from Artifact Evaluation to Student Research Competition Chair. Dr. Nigam's research centers on programming languages and hardware systems, with particular emphasis on creating compilers that transform programs into architectures. His work bridges theoretical type systems with practical hardware implementation, developing tools like Calyx (an intermediate language for hardware accelerator generators) and Dahlia (implementing time-sensitive affine types). His approach combines formal methods with practical compiler design to address challenges in predictable accelerator generation and hardware compilation. His publication record reveals a consistent trajectory in hardware-aware programming language design, with recent work focusing on unifying static and dynamic intermediate languages for accelerator generators. The publications demonstrate expertise across multiple subfields including type systems for hardware timing constraints, modular hardware design methodologies, and synthesis-aided compiler techniques for specialized architectures like DSPs. As an active member of the programming languages community, Nigam has served on numerous conference committees including PLDI, OOPSLA, and LCTES. He has chaired sessions, organized tutorials (including 'DSL-based Hardware Generation'), and contributed to community initiatives like PL Tea. His GitHub presence shows active development in projects related to hardware compilation with significant contributions to repositories like Calyx, Filament, and Dahlia. Dr. Nigam leads the FLAME Lab at MIT, which focuses on creating programming models and compiler infrastructure for hardware acceleration. His work with the Calyx compiler ecosystem represents a significant contribution to the field of hardware accelerator generation, providing tools that enable more predictable and efficient hardware compilation processes. His research has practical implications for domain-specific hardware accelerators and the broader challenge of making hardware design more accessible through programming language techniques.
Clément Pit-Claudel is an assistant professor at École Polytechnique Fédérale de Lausanne (EPFL) in the School of Computer and Communication Sciences, Department of Computer Science. He leads the SYSTEMF lab which he founded in January 2023. Prior to joining EPFL, he was a PhD candidate at MIT with Adam Chlipala and subsequently worked as a senior applied scientist at Amazon AWS. His academic journey began at École Polytechnique in France, followed by doctoral studies at MIT. Dr. Pit-Claudel's research focuses on programming languages, compilers, and formal verification, with broader interests spanning systems engineering, hardware design languages, security, performance engineering, databases, and type theory. His work centers around three main axes: extensible compilation (teaching compilers domain-specific optimization tricks), hardware design languages and verification, and tooling for proof assistants. He has developed several influential systems including Elk (a linear-time engine for JavaScript regexes), Warblre (a Coq translation of JS regex specification), Fiat (a library for correct-by-construction refinement), Narcissus (for verified binary encoders/decoders), F2F (a program extraction framework), Rupicola (a compiler-construction toolkit), Kôika (a rule-based hardware design language), Cuttlesim (a fast hardware simulator), and Alectryon (a literate programming system for Coq). His publications span top venues including PLDI, POPL, ICFP, ASPLOS, and SLE, with recent work focusing on verified JavaScript regular expressions, foundational integration verification of cryptographic servers, and relational compilation techniques. His research aims to build small, fast, and completely verified components for critical systems through a combination of machine-checked proofs, hardware-software co-design, low-level compiler engineering, and new tools for interactive theorem proving. His notable awards include the Distinguished Artifact award at SLE 2020 for 'Untangling Mechanized Proofs,' the William A. Martin Memorial Thesis Award from MIT in 2016, and the Frederick C. Hennie III Teaching Award from MIT in 2016. He has served on program committees for numerous conferences including PLDI, POPL, ICFP, and SPLASH, and has organized workshops such as the Coq Workshop and Proof Systems. As an educator, he teaches 'Software Construction' (undergraduate level, ~400 students) and 'Interactive Theorem Proving' (graduate level) at EPFL. His teaching philosophy emphasizes hands-on learning, continuous assessment through oral examinations, and designing assignments that lead students to build concrete artifacts they can be proud of. His approach is informed by hundreds of hours of in-class instruction in Europe and the US, resulting in stellar student reviews and multiple teaching awards.
Jean-François Boland is a Professor in the Department of Electrical Engineering at École de technologie supérieure (ÉTS), where he leads research in aerospace systems and embedded technologies through the LASSENA Laboratory. His expertise spans avionics, autonomous systems, digital design methodologies, and functional verification. Research Interests: Aeronautics & Aerospace : Flight control systems, radiation-hardened avionics, integrated modular architectures Intelligent Systems : Bipedal robot control, adaptive algorithms, autonomous navigation Digital Design : RTL verification, fault modeling, high-level synthesis His recent publications emphasize fault-tolerant aerospace systems , with 60% focused on radiation effects mitigation, 25% on autonomous robotics, and 15% on design methodologies. Key trends include AI-enhanced verification (2019), SEU-resistant flight controls (2013–2016), and bipedal locomotion control (2021–2022). Awards and Honors: Ambassadeur Honoraire (ÉTS, 2020) CNESST Safety Award & GREPCI Finalist (2017) CRIAQ Project Excellence Award (2012) Two ÉTS Teaching Excellence Awards (2011, 2013) He actively advises graduate students, with 16+ supervisees working on projects like fault-tolerant avionics and quadcopter control systems. Laboratory work at LASSENA emphasizes resilient embedded systems and aerospace-grade validation platforms.
