Shaked Flur

Shaked Flur is a Researcher at the Department of Computer Science and Technology, University of Cambridge. His work focuses on formal methods, instruction-set semantics, and concurrency models in computer architectures. He contributes to the development of formal verification tools and specifications for ISA standards like ARMv8-A, RISC-V, and CHERI-MIPS. His research bridges academic formal models with practical software and hardware design, emphasizing the adoption of rigorous methods in real-world systems. Flur collaborates on projects such as the Sail specification language, enhancing clarity and precision in ISA documentation. His publications address challenges in memory models, concurrency semantics, and automated verification techniques.