Rakesh Kumar

Rakesh Kumar is an Associate Professor in the Department of Computer Science at NTNU, affiliated with the Computer Architecture Lab (CAL). He received his PhD from UPC Barcelona in 2014 and previously worked at Uppsala University, the University of Edinburgh, and Intel Barcelona Research Center. His research focuses on improving datacenter efficiency through microarchitecture and memory systems, hardware/software co-design, and dynamic code translation.

Education:

• PhD in Computer Architecture, UPC Barcelona (2014)
• MEng in Microelectronics, BITS Pilani (2008)
• BTech in Electronics and Communications, Kurukshetra University (2005)

Research Interests:

His work emphasizes processor microarchitecture, memory systems, and energy-efficient designs. Key areas include hardware/software co-design (e.g., Nvidia Denver alternatives), dynamic vectorization, and server optimization. Recent projects target server front-end bottlenecks, address translation efficiency, and BTB organization for data centers.

Publications:

Recent work includes contributions to IEEE/ACM MICRO, HPCA, and ISCA, focusing on topics like uneven block size instruction caches, address translation optimizations, and server architecture improvements.

Awards:

• Intel Spontaneous Level II/Excellence Award (2014)
• Distinguished Artifact Award at IEEE/ACM MICRO 2023

Teaching & Advising:

Teaches courses like TDT4258 Low Level Programming and advises students on projects such as vector unit design and microarchitecture optimization. Active in mentoring PhD candidates and leading the Computer Architecture Lab.

Labs/Teams:

Affiliated with the Computer Architecture Lab (CAL) and collaborates on projects like DARCO, an infrastructure for HW/SW co-designed virtual machines.