Laurent George

Laurent George is a Professor at ESIEE Paris and a member of the Laboratoire d'Informatique Gaspard-Monge (LIGM) at the University of Paris-Est. He leads the Software, Networks, and Real-Time research group and is an associate researcher at INRIA's AOSTE team. His work focuses on real-time scheduling in embedded and distributed systems, multiprocessor systems, and energy efficiency in sensor networks.

Education:

• Habilitation to Direct Research (HDR), University of Nantes, 2008
• PhD in Real-Time Distributed Systems, University of Versailles-St Quentin, 1998

Research Interests: Real-time scheduling, mixed-criticality systems, sensitivity analysis, multiprocessor architectures, and distributed real-time systems.

Key Contributions: Developed frameworks for real-time analysis (e.g., FORTAS), pioneered work on sensitivity analysis, and authored over 100 publications. Supervised 14 PhD students.

Teaching: Courses in Real-Time Systems, Networks, and Embedded Systems at ESIEE Paris and the University of Paris-Est. Previously coordinated programs at Ecole Centrale d'Electronique and CNAM.

Professional Activities: Program committee member for ECRTS, RTNS, and other conferences. Organized workshops like ETR and CDUR.