About
Andre Seznec is a Research Fellow at INRIA and a Fellow at SiFive. He has made groundbreaking contributions to computer architecture, particularly in branch prediction and cache memory design, with innovations like the TAGE branch predictor and skewed-associative cache embedded in billions of CPUs worldwide.
- ACM-IEEE CS Eckert-Mauchly Award (2025)
- ACM Fellow (2016)
His research since the 1990s has influenced industrial microprocessor designs, and he has authored over 100 papers. He has mentored 28 PhD students (1991-2020) and held leadership roles at conferences like ISCA.
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